PIC16LF1902-E/SS Microchip Technology, PIC16LF1902-E/SS Datasheet - Page 44
![3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SSOP .209in TUBE](/photos/16/9/160971/ssop-28_sml.jpg)
PIC16LF1902-E/SS
Manufacturer Part Number
PIC16LF1902-E/SS
Description
3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1902-EMV.pdf
(240 pages)
Specifications of PIC16LF1902-E/SS
Processor Series
PIC16LF190x
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
2 KB
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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PIC16LF1902/3
5.1
The POR circuit holds the device in Reset until V
reached an acceptable level for minimum operation.
Slow rising V
performance may require greater than minimum V
The PWRT, BOR or MCLR features can be used to
extend the start-up period until all device operation
conditions have been met.
5.1.1
The Power-up Timer provides a nominal 64 ms
time-out on POR or Brown-out Reset.
The device is held in Reset as long as PWRT is active.
The PWRT delay allows additional time for the V
rise to an acceptable level. The Power-up Timer is
enabled by clearing the PWRTE bit in Configuration
Word 1.
The Power-up Timer starts after the release of the POR
and BOR.
For additional information, refer to Application Note
AN607, “Power-up Trouble Shooting” (DS00607).
TABLE 5-1:
5.2.1
When the BOREN bits of Configuration Word 1 are set
to ‘11’, the BOR is always on. The device start-up will
be delayed until the BOR is ready and V
than the BOR threshold.
BOR protection is active during Sleep. The BOR does
not delay wake-up from Sleep.
5.2.2
When the BOREN bits of Configuration Word 1 are set
to ‘10’, the BOR is on, except in Sleep. The device
start-up will be delayed until the BOR is ready and V
is higher than the BOR threshold.
BOR protection is not active during Sleep. The device
wake-up will be delayed until the BOR is ready.
DS41455B-page 44
BOREN<1:0>
Note 1: Even though this case specifically waits for the BOR, the BOR is already operating, so there is no delay in
11
10
01
00
Power-on Reset (POR)
POWER-UP TIMER (PWRT)
start-up.
BOR IS ALWAYS ON
BOR IS OFF IN SLEEP
DD
, fast operating speeds or analog
BOR OPERATING MODES
SBOREN
X
X
1
0
X
Device Mode
Awake
DD
Sleep
X
X
X
is higher
DD
DD
Preliminary
has
DD
DD
to
.
BOR Mode
Disabled
Disabled
Disabled
Active
Active
Active
5.2
The BOR circuit holds the device in Reset when V
reaches a selectable minimum level. Between the
POR and BOR, complete voltage range coverage for
execution protection can be implemented.
The Brown-out Reset module has four operating
modes controlled by the BOREN<1:0> bits in Configu-
ration Word 1. The four operating modes are:
• BOR is always on
• BOR is off when in Sleep
• BOR is controlled by software
• BOR is always off
Refer to
The Brown-out Reset voltage level is selectable by
configuring the BORV bit in Configuration Word 2.
A V
gering on small events. If V
duration greater than parameter T
will reset. See
5.2.3
When the BOREN bits of Configuration Word 1 are set
to ‘01’, the BOR is controlled by the SBOREN bit of the
BORCON register. The device start-up is not delayed
by the BOR ready condition or the V
BOR protection begins as soon as the BOR circuit is
ready. The status of the BOR circuit is reflected in the
BORRDY bit of the BORCON register.
BOR protection is unchanged by Sleep.
DD
noise rejection filter prevents the BOR from trig-
Table 5-1
Brown-Out Reset (BOR)
upon release of POR
Device Operation
BOR CONTROLLED BY SOFTWARE
Figure 5-2
for more information.
Waits for BOR ready
Waits for BOR ready
Begins immediately
Begins immediately
Begins immediately
2011 Microchip Technology Inc.
for more information.
DD
falls below V
upon wake- up from
Device Operation
BORDC
DD
level.
Sleep
(1)
, the device
BOR
for a
DD
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