PIC16LF1829-I/SS Microchip Technology, PIC16LF1829-I/SS Datasheet - Page 241

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core, Nan

PIC16LF1829-I/SS

Manufacturer Part Number
PIC16LF1829-I/SS
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16LF1829-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.200", 5.30mm Width)
Processor Series
PIC16LF182x
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1829-I/SS
Manufacturer:
TOSHIBA
Quantity:
6 700
Part Number:
PIC16LF1829-I/SS
Manufacturer:
MIC
Quantity:
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Part Number:
PIC16LF1829-I/SS
0
REGISTER 24-4:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6-0
Note 1:
PxRSEN
R/W-0/0
Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator mode or Fail-Safe
mode is enabled.
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the CCPxASE bit clears automatically once the shutdown event goes away;
0 = Upon auto-shutdown, CCPxASE must be cleared in software to restart the PWM
PxDC<6:0>: PWM Delay Count bits
PxDCx = Number of F
R/W-0/0
the PWM restarts automatically
PWMxCON: ENHANCED PWM CONTROL REGISTER
should transition active and the actual time it transitions active
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
OSC
/4 (4 * T
R/W-0/0
Preliminary
OSC
) cycles between the scheduled time when a PWM signal
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
PxDC<6:0>
R/W-0/0
PIC16F/LF1825/1829
R/W-0/0
R/W-0/0
DS41440A-page 243
R/W-0/0
bit 0

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