PIC16LF1828-E/ML Microchip Technology, PIC16LF1828-E/ML Datasheet - Page 124

• Manufacturer Part Number: PIC16LF1828-E/ML
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1828-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16(L)F1824/1828
12.2
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA
(Register
corresponding PORTA pin an input (i.e., disable the
output driver). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., enables
output driver and puts the contents of the output latch
on the selected pin). The exception is RA3, which is
input only and its TRIS bit will always read as ‘1’.
Example 12-1
Reading the PORTA register
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch (LATA).
The TRISA register
PORTA pin output drivers, even when they are being
used as analog inputs. The user should ensure the bits
in the TRISA register are maintained set when using
them as analog inputs. I/O pins configured as analog
input always read ‘0’.
The INLVLA register
voltage threshold for each of the available PORTA input
pins. A selection between the Schmitt Trigger CMOS or
the TTL Compatible thresholds is available. The input
threshold is important in determining the value of a
read of the PORTA register and also the level at which
an Interrupt-on-Change occurs, if that feature is
enabled. See
PIC16F/LF1824/1828-I/E”
threshold levels.
12.2.1
Each of the PORTA pins has an individually configurable
internal weak pull-up. Control bits WPUA<5:0> enable or
disable each pull-up (see
pull-up is automatically turned off when the port pin is
configured as an output. All pull-ups are disabled on a
Power-on Reset by the WPUEN bit of the OPTION
register.
DS41419B-page 124
Note:
PORTA Registers
12-4). Setting a TRISA bit (= 1) will make the
Changing the input threshold selection
should be performed while all peripheral
modules are disabled. Changing the
threshold level during the time a module is
active may inadvertently generate a tran-
sition associated with an input pin, regard-
less of the actual voltage level on that pin.
WEAK PULL-UPS
shows how to initialize PORTA.
Section 30.4 “DC Characteristics:
(Register
(Register
Register
for more information on
(Register
12-8) controls the input
12-4) controls the
12-7). Each weak
12-3) reads the
Preliminary
12.2.2
The ANSELA register
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELA bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSELA bits has no affect on digital
output functions. A pin with TRIS clear and ANSEL set
will still operate as a digital output, but the Input mode
will be analog. This can cause unexpected behavior
when executing read-modify-write instructions on the
affected port.
EXAMPLE 12-1:
BANKSEL
CLRF
BANKSEL
CLRF
BANKSEL
CLRF
BANKSEL
MOVLW
MOVWF
Note:
ANSELA REGISTER
The ANSELA register must be initialized
to configure an analog channel as a digital
input. Pins configured as analog inputs
will read ‘0’.
PORTA
PORTA
LATA
LATA
ANSELA
ANSELA
TRISA
B'00111000' ;Set RA<5:3> as inputs
TRISA
INITIALIZING PORTA
 2010 Microchip Technology Inc.
(Register
;
;Init PORTA
;Data Latch
;
;
;digital I/O
;
;and set RA<2:0> as
;outputs
12-6) is used to