PIC16LF1827-E/MV Microchip Technology, PIC16LF1827-E/MV Datasheet - Page 342
PIC16LF1827-E/MV
Manufacturer Part Number
PIC16LF1827-E/MV
Description
7 KB Flash, 384 Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F/LF1826/27
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
TRIS
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41391C-page 342
Swap Nibbles in f
[ label ]
0 f 127
d [0,1]
(f<3:0>) (destination<7:4>),
(f<7:4>) (destination<3:0>)
None
The upper and lower nibbles of regis-
ter ‘f’ are exchanged. If ‘d’ is ‘0’, the
result is placed in the W register. If ‘d’
is ‘1’, the result is placed in register ‘f’.
Load TRIS Register with W
[ label ] TRIS f
5 f 7
(W) TRIS register ‘f’
None
Move data from W register to TRIS
register.
When ‘f’ = 5, TRISA is loaded.
When ‘f’ = 6, TRISB is loaded.
SWAPF f,d
Preliminary
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Exclusive OR W with f
[ label ]
0 f 127
d [0,1]
(W) .XOR. (f) destination)
Z
Exclusive OR the contents of the W
register with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If ‘d’
is ‘1’, the result is stored back in regis-
ter ‘f’.
Exclusive OR literal with W
[ label ]
0 k 255
(W) .XOR. k W)
Z
The contents of the W register are
XOR’ed with the eight-bit
literal ‘k’. The result is placed in the
W register.
2010 Microchip Technology Inc.
XORWF
XORLW k
f,d
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