PIC16LF1518-E/SS Microchip Technology, PIC16LF1518-E/SS Datasheet - Page 185

• Manufacturer Part Number: PIC16LF1518-E/SS
• Description: 28-pin, 28KB Flash, 1024B RAM, 10-bit ADC, 2xCCP, SPI, MI2C, EUSART, 1.8V-3.6V 2
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1518-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 28KB (16K x 14)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC16LF151x
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.0
21.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The SPI interface supports the following modes and
features:
• Master mode
• Slave mode
• Clock Parity
• Slave Select Synchronization (Slave mode only)
• Daisy-chain connection of slave devices
Figure 21-1
module.
FIGURE 21-1:
 2010 Microchip Technology Inc.
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
is a block diagram of the SPI interface
MSSP BLOCK DIAGRAM (SPI MODE)
2
C™)
SCK
SDO
SDI
SS
Read
SS Control
TRIS bit
bit 0
Enable
Select
Select
Edge
Edge
Preliminary
SSPBUF Reg
SSPSR Reg
SSPM<3:0>
4
Clock
PIC16(L)F1516/7/8/9
Shift
Write
(
Prescaler
Data Bus
Baud Rate
(SSPADD)
TMR2 Output
4, 16, 64
Generator
2 (CKP, CKE)
2
Clock Select
T
OSC
)
DS41452A-page 185