PIC16F872T-I/SO Microchip Technology, PIC16F872T-I/SO Datasheet - Page 139
PIC16F872T-I/SO
Manufacturer Part Number
PIC16F872T-I/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F872-ISO.pdf
(168 pages)
5.PIC16F872-ISO.pdf
(5 pages)
6.PIC16F872-ISO.pdf
(6 pages)
Specifications of PIC16F872T-I/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F872-ISO PDF datasheet #4
- PIC16F872-ISO PDF datasheet #5
- PIC16F872-ISO PDF datasheet #6
- Current page: 139 of 168
- Download datasheet (3Mb)
FIGURE 14-16:
TABLE 14-10: A/D CONVERSION REQUIREMENTS
© 2006 Microchip Technology Inc.
Note 1: ADRES register may be read on the following T
Param
No.
130
131
132
134
A/D DATA
Note:
SAMPLE
A/D CLK
BSF ADCON0, GO
2: See Section 10.1 for min. conditions.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
§ This specification ensured by design.
* These parameters are characterized but not tested.
ADRES
T
T
T
T
Sym
AD
CNV
ACQ
GO
tested.
ADIF
GO
Q4
A/D Clock Period
Conversion Time (not including S/H time)
(Note 1)
Acquisition Time
Q4 to A/D Clock Start
If the A/D clock source is selected as RC, a time of T
SLEEP instruction to be executed.
132
A/D CONVERSION TIMING
Characteristic
(T
OSC
/2)
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
9
(1)
8
OLD_DATA
CY
7
(Note 2)
SAMPLING STOPPED
cycle.
Min
10*
1.6
3.0
2.0
3.0
—
131
130
T
CY
OSC
Typ†
4.0
6.0
40
—
—
—
—
is added before the A/D clock starts. This allows the
/2 §
2
Max
6.0
9.0
12
—
—
—
—
—
1
Units
T
—
AD
s
s
s
s
s
s
1 T
0
T
T
A/D RC mode
A/D RC mode
The minimum time is the
amplifier settling time. This may
be used if the "new" input volt-
age has not changed by more
than 1 LSb (i.e., 20.0 mV @
5.12V) from the last sampled
voltage (as stated on C
If the A/D clock source is
selected as RC, a time of T
added before the A/D clock
starts. This allows the SLEEP
instruction to be executed.
CY
OSC
OSC
PIC16F872
based, V
based, V
NEW_DATA
DONE
Conditions
DS30221C-page 137
REF
REF
3.0V
2.0V
HOLD
CY
).
is
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