PIC16F872T-I/SO Microchip Technology, PIC16F872T-I/SO Datasheet - Page 63
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PIC16F872T-I/SO
Manufacturer Part Number
PIC16F872T-I/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F872-ISO.pdf
(168 pages)
5.PIC16F872-ISO.pdf
(5 pages)
6.PIC16F872-ISO.pdf
(6 pages)
Specifications of PIC16F872T-I/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F872-ISO PDF datasheet #4
- PIC16F872-ISO PDF datasheet #5
- PIC16F872-ISO PDF datasheet #6
- Current page: 63 of 688
- Download datasheet (3Mb)
Table 3-4:
Register
PIR2
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
PR2
PREFA
PREFB
RCSTA
RCREG
SLPCON
SPBRG
SSPBUF
SSPCON
SSPADD
SSPSTAT
STATUS
T1CON
T2CON
TMR0
TMR1L
TMR1H
TMR2
TRIS
TRISA
TRISB
TRISC
TRISD
TRISE
TRISF
TRISG
TXREG
TXSTA
VRCON
W
Legend:
Note 1: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
1997 Microchip Technology Inc.
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
3: See
u
vector (0004h).
= unchanged,
Table 3-3
Initialization Conditions for Special Function Registers (Cont.’d)
for reset value for specific condition.
x
= unknown,
Brown-out Reset
Power-on Reset
---- ---0
--xx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0000 -00x
0000 0000
0011 1111
0000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0001 1xxx
--00 0000
-000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 0000
--11 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
1111 1111
1111 1111
0000 0000
0000 -010
000- 0000
xxxx xxxx
-
= unimplemented bit, reads as ‘0’,
MCLR Reset during:
- normal operation
- SLEEP or
WDT Reset
000q quuu
---- ---0
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0000 -00x
0000 0000
0011 1111
0000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
--uu uuuu
-000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
--11 1111
--11 1111
1111 1111
1111 1111
1111 1111
0000 -111
1111 1111
1111 1111
0000 0000
0000 -010
000- 0000
uuuu uuuu
Section 3. Reset
q
(3)
= value depends on condition.
Wake-up from SLEEP
through:
- interrupt
- WDT time-out
uuuq quuu
---- ---u
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
uuuu uuuu
uuuu uuuu
1111 1111
uuuu uuuu
uuuu uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
uuu- uuuu
uuuu uuuu
DS31003A-page 3-13
(3)
3
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