PIC16F723A-E/SS Microchip Technology, PIC16F723A-E/SS Datasheet - Page 150
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PIC16F723A-E/SS
Manufacturer Part Number
PIC16F723A-E/SS
Description
7 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc. 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F722AT-ISS.pdf
(284 pages)
Specifications of PIC16F723A-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F/LF722A/723A
FIGURE 16-8:
TABLE 16-7:
DS41417A-page 150
INTCON
PIE1
PIR1
RCREG
RCSTA
TRISC
TXSTA
Legend:
TX/CK pin
(Interrupt)
CREN bit
bit SREN
SREN bit
Name
RCIF bit
RCREG
Note:
Write to
RX/DT
Read
pin
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Master Reception.
AUSART Receive Data Register
TMR1GIE
‘0’
TMR1GIF
TRISC7
Timing diagram demonstrates Synchronous Master mode with bit SREN = 1 and bit BRGH = 0.
SPEN
CSRC
Bit 7
GIE
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
TRISC6
ADIE
Bit 6
PEIE
ADIF
RX9
TX9
bit 0
TRISC5
SREN
TXEN
RCIE
RCIF
Bit 5
T0IE
bit 1
TRISC4
CREN
SYNC
Bit 4
INTE
TXIE
TXIF
bit 2
TRISC3
ADDEN
SSPIE
SSPIF
RBIE
Bit 3
—
bit 3
CCP1IE
CCP1IF
TRISC2
BRGH
FERR
Bit 2
T0IF
bit 4
TMR2IE
TMR2IF
TRISC1
OERR
TRMT
INTF
Bit 1
bit 5
TMR1IE
TMR1IF
TRISC0
RX9D
TX9D
RBIF
Bit 0
2010 Microchip Technology Inc.
bit 6
0000 000x
0000 0000
0000 0000
0000 0000
0000 000X
1111 1111
0000 -010
POR, BOR
Value on
bit 7
0000 000x
0000 0000
0000 0000
0000 0000
0000 000X
1111 1111
0000 -010
Value on
all other
Resets
‘0’
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