PIC16F722-E/ML Microchip Technology, PIC16F722-E/ML Datasheet - Page 18
![3.5 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc 28 QFN 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F722-E/ML
Manufacturer Part Number
PIC16F722-E/ML
Description
3.5 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.AC164112.pdf
(302 pages)
2.PIC16F722-ISS.pdf
(8 pages)
3.PIC16F722-ISS.pdf
(10 pages)
4.PIC16F722-ISS.pdf
(32 pages)
5.PIC16F722-ISS.pdf
(2 pages)
6.PIC16F722-ISS.pdf
(8 pages)
Specifications of PIC16F722-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F72X/PIC16LF72X
5.0
The PIC16F72X/PIC16LF72X
capability of storing eight 14-bit words in its data
latches. The data latches are internal to the
PIC16F72X/PIC16LF72X devices and are only used
for programming. The data latches allow the user to
program up to eight program words with a single Begin
Externally Timed Programming or Begin Internally
Timed Programming command. The Load Program
Data or the Load Configuration Word command is used
to load a single data latch. The data latch will hold the
data until Begin Externally Timed Programming or
Begin Internally Timed Programming command is
given.
FIGURE 5-1:
DS41332C-page 18
Command
Increment
Address
PROGRAMMING ALGORITHMS
Note 1: This step is optional if device has already been erased or has not been previously programmed.
No
ONE-WORD PROGRAMMING FLOWCHART
Program Cycle
All Locations
Bulk Erase
Memory
One-word
Program
Done?
Done
Start
devices have the
(1)
Yes
Advance Information
The data latches are aligned with the 3 LSb of the PC.
The address of the PC, at the time the Begin Externally
Timed Programming or Begin Internally Timed
Programming command is given, will determine which
location(s) in memory are written. Writes can not cross
a physical eight-word boundary.
attempting to write from PC 0002h-0009h will result in
data being written to 0008h-000Fh.
If more than 8 data latches are written without a Begin
Externally Timed Programming or Begin Internally
Timed Programming command the data in the data
latches will be overwritten. The following diagrams
show the recommended flowcharts for programming.
(Internally timed)
Programming
Command
Wait T
Begin
PINT
Program Memory
Program Cycle
Load Data
2010 Microchip Technology Inc.
for
(Externally timed)
Programming
Programming
Wait T
Command
Wait T
Begin
End
PEXT
DIS
For example,