PIC16F505T-I/MG Microchip Technology, PIC16F505T-I/MG Datasheet - Page 63

• Manufacturer Part Number: PIC16F505T-I/MG
• Description: 1.5 KB Flash, 72 RAM, 12 I/O 16 QFN 3x3x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F505T-I/MG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 11
• Program Memory Size: 1.5KB (1K x 12)
• Program Memory Type: FLASH
• Ram Size: 72 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RETLW
Syntax:
Operands:
Operation:
Status Affected: None
Description:
RLF
Syntax:
Operands:
Operation:
Status Affected: C
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected: C
Description:
© 2009 Microchip Technology Inc.
Return with Literal in W
[ label ]
0 ≤ k ≤ 255
k → (W);
TOS → PC
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address). This
is a two-cycle instruction.
Rotate Left f through Carry
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
See description below
The contents of register ‘f’ are
rotated one bit to the left through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is stored back in
register ‘f’.
Rotate Right f through Carry
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
See description below
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
C
C
RETLW k
RRF f,d
register ‘f’
register ‘f’
RLF
f,d
PIC12F508/509/16F505
SLEEP
Syntax:
Operands:
Operation:
Status Affected: TO, PD, RBWUF
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SWAPF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
Enter SLEEP Mode
[label ]
None
00h → WDT;
0 → WDT prescaler;
1 → TO;
0 → PD
Time-out Status bit (TO) is set. The
Power-down Status bit (PD) is
cleared.
RBWUF is unaffected.
The WDT and its prescaler are
cleared.
The processor is put into Sleep
mode with the oscillator stopped.
See Section 7.9 “Power-down
Mode (Sleep)” on Sleep for more
details.
Subtract W from f
[label ]
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – (W) → (dest)
Subtract (2’s complement method)
the W register from register ‘f’. If ‘d’
is ‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Swap Nibbles in f
[ label ] SWAPF f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f<3:0>) → (dest<7:4>);
(f<7:4>) → (dest<3:0>)
The upper and lower nibbles of
register ‘f’ are exchanged. If ‘d’ is
‘0’, the result is placed in W
register. If ‘d’ is ‘1’, the result is
placed in register ‘f’.
SLEEP
SUBWF f,d
DS41236E-page 63