PIC16F1938-I/MV Microchip Technology, PIC16F1938-I/MV Datasheet - Page 267
![28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC16F1938-I/MV
Manufacturer Part Number
PIC16F1938-I/MV
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1938-ISS.pdf
(10 pages)
Specifications of PIC16F1938-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DV164035, DV244005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1938-ISS PDF datasheet #4
- Current page: 267 of 508
- Download datasheet (5Mb)
23.5.8
The addressing procedure for the I
the first byte after the Start condition usually deter-
mines which device will be the slave addressed by the
master device. The exception is the general call
address which can address all devices. When this
address is used, all devices should, in theory, respond
with an acknowledge.
The general call address is a reserved address in the
I
GCEN bit of the SSPCON2 register is set, the slave
module will automatically ACK the reception of this
address regardless of the value stored in SSPADD.
After the slave clocks in an address of all zeros with
the R/W bit clear, an interrupt is generated and slave
software
Figure 23-23
sequence.
FIGURE 23-24:
23.5.9
An SSP Mask (SSPMSK) register (Register 23-5) is
available in I
held in the SSPSR register during an address
comparison operation. A zero (‘0’) bit in the SSPMSK
register has the effect of making the corresponding bit
of the received address a “don’t care”.
This register is reset to all ‘1’s upon any Reset
condition and, therefore, has no effect on standard
SSP operation until written with a mask value.
The SSP Mask register is active during:
• 7-bit Address mode: address compare of A<7:1>.
• 10-bit Address mode: address compare of A<7:0>
2009 Microchip Technology Inc.
2
C protocol, defined as address 0x00. When the
only. The SSP mask has no effect during the
reception of the first (high) byte of the address.
GCEN (SSPCON2<7>)
SDA
SCL
SSPIF
BF (SSPSTAT<0>)
can
GENERAL CALL ADDRESS
SUPPORT
SSP MASK REGISTER
2
C Slave mode as a mask for the value
shows
read
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
a
1
SSPBUF
general
2
General Call Address
2
3
C bus is such that
and
call
4
reception
5
respond.
6
Preliminary
7
R/W =
8
0
ACK
In 10-bit Address mode, the UA bit will not be set on
the reception of the general call address. The slave
will prepare to receive the second byte as data, just as
it would in 7-bit mode.
If the AHEN bit of the SSPCON3 register is set, just as
with any other address reception, the slave hardware
will stretch the clock after the 8th falling edge of SCL.
The slave must then set its ACKDT value and release
the clock with communication progressing as it would
normally.
Address is compared to General Call Address
after ACK, set interrupt
9
PIC16F193X/LF193X
D7
1
D6
2
Cleared by software
SSPBUF is read
Receiving Data
D5
3
D4
4
D3
5
D2
6
D1
7
DS41364D-page 267
D0
8
ACK
9
’1’
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