PIC16F1507T-I/SO Microchip Technology, PIC16F1507T-I/SO Datasheet - Page 211
![3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in T/R](/photos/16/12/161297/soic20_sml.jpg)
PIC16F1507T-I/SO
Manufacturer Part Number
PIC16F1507T-I/SO
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F1507-EML.pdf
(266 pages)
2.PIC16F1507-EML.pdf
(26 pages)
3.PIC16F1507-EML.pdf
(40 pages)
Specifications of PIC16F1507T-I/SO
Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1507T-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16(L)F1507
24.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41586A-page 211
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 f 127
d 0 , 1
(W) + (f) (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘ 0 ’, the result is
stored in the W register. If ‘d’ is ‘ 1 ’, the
result is stored back in register ‘f’.
ADD W and CARRY bit to f
[ label ] ADDWFC
0 f 127
d [0,1]
(W) + (f) + (C) dest
C, DC, Z
Add W, the Carry flag and data mem-
ory location ‘f’. If ‘d’ is ‘ 0 ’, the result is
placed in W. If ‘d’ is ‘ 1 ’, the result is
placed in data memory location ‘f’.
Add Literal to FSRn
[ label ] ADDFSR FSRn, k
-32 k 31
n [ 0, 1]
FSR(n) + k FSR(n)
None
The signed 6-bit literal ‘k’ is added to
the contents of the FSRnH:FSRnL
register pair.
FSRn is limited to the range 0000h -
FFFFh. Moving beyond these bounds
will cause the FSR to wrap around.
Add literal and W
[ label ] ADDLW
0 k 255
(W) + k (W)
C, DC, Z
The contents of the W register are
added to the eight-bit literal ‘k’ and the
result is placed in the W register.
f,d
k
f {,d}
Preliminary
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ASRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND W with f
[ label ] ANDWF
0 f 127
d 0 , 1
(W) .AND. (f) (destination)
Z
AND the W register with register ‘f’. If
‘d’ is ‘ 0 ’, the result is stored in the W
register. If ‘d’ is ‘ 1 ’, the result is stored
back in register ‘f’.
AND literal with W
[ label ] ANDLW
0 k 255
(W) .AND. (k) (W)
Z
The contents of W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W register.
Arithmetic Right Shift
[ label ] ASRF
0 f 127
d [0,1]
(f<7>) dest<7>
(f<7:1>) dest<6:0>,
(f<0>) C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. The MSb remains unchanged. If
‘d’ is ‘ 0 ’, the result is placed in W. If ‘d’
is ‘ 1 ’, the result is stored back in reg-
ister ‘f’.
2011 Microchip Technology Inc.
register f
f {,d}
f,d
k
C
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