PIC12LF1822-E/SN Microchip Technology, PIC12LF1822-E/SN Datasheet - Page 216

3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na

PIC12LF1822-E/SN

Manufacturer Part Number
PIC12LF1822-E/SN
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Na
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheet

Specifications of PIC12LF1822-E/SN

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12LF1822-E/SN
Manufacturer:
MICROCHIP
Quantity:
4 700
PIC12F/LF1822/PIC16F/LF1823
24.4.2
In Full-Bridge mode, all four pins are used as outputs.
An example of Full-Bridge application is shown in
Figure
In the Forward mode, pin CCP1/P1A is driven to its
active state, pin P1D is modulated, while P1B and P1C
will be driven to their inactive state as shown in
Figure
In the Reverse mode, P1C is driven to its active state,
pin P1B is modulated, while P1A and P1D will be driven
to their inactive state as shown
P1A, P1B, P1C and P1D outputs are multiplexed with
the PORT data latches. The associated TRIS bits must
be cleared to configure the P1A, P1B, P1C and P1D
pins as outputs.
FIGURE 24-10:
DS41413B-page 216
24-10.
24-11.
FULL-BRIDGE MODE
(PIC16F/LF1823 ONLY)
P1A
P1B
P1C
P1D
EXAMPLE OF FULL-BRIDGE APPLICATION
Figure
24-11.
FET
Driver
FET
Driver
Preliminary
QA
QB
Load
V+
V-
QC
QD
 2010 Microchip Technology Inc.
FET
Driver
FET
Driver

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