PIC12F675-E/MD Microchip Technology, PIC12F675-E/MD Datasheet - Page 6
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PIC12F675-E/MD
Manufacturer Part Number
PIC12F675-E/MD
Description
1.75KB Flash, 64 RAM, 6 I/O 8 DFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F675-E/MD
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164326 - MODULA SKT PM3 20QFN
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC12F629/675/PIC16F630/676
2.3.1.1
After receiving this command, the Program Counter
(PC) will be set to 0x2000. Then, by applying 16 cycles
to the clock pin, the chip will load 14 bits in a data word,
as described above, which will be programmed into the
configuration memory. A description of the memory
mapping schemes of the program memory for normal
operation and Configuration mode operation is shown in
Figure 2-3. After the configuration memory is entered,
the only way to get back to the user program memory is
to exit the Program/Verify mode by taking MCLR low
(V
FIGURE 2-3:
2.3.1.2
After receiving this command, the chip will load in a
14-bit data word when 16 cycles are applied, as
described previously. A timing diagram for the Load
Data command is shown in Figure 2-4.
FIGURE 2-4:
DS41191D-page 6
CLOCK
CLOCK
GP0
GP1
IL
GP0
GP1
DATA
DATA
).
Note 1: GP0 and GP1 apply to PIC12F629/675 only. For PIC16F630/676, use RA0 and RA1, respectively.
Note 1: GP0 and GP1 apply to PIC12F629/675 only. For PIC16F630/676, use RA0 and RA1, respectively.
(1)
(1)
(1)
(1)
Load Configuration
Load Data For Program Memory
1
1
0
0
LOAD CONFIGURATION COMMAND
LOAD DATA FOR PROGRAM MEMORY COMMAND
2
2
0
0
0
1
T
SET
3
T
0
3
0
HLD
1
1
4
4
0
0
5
x
5
x
T
T
DLY
6
DLY
6
x
x
T
T
1
DLY
1
DLY
2
2
1
strt_bit
1
strt_bit
2
2
LSb
LSb
T
3
T
3
SET
SET
T
T
HLD
HLD
1
1
1
4
1
4
© 2005 Microchip Technology Inc.
5
5
15
15
MSb
MSb
16
16
stp_bit
stp_bit