PIC12F1822-E/P Microchip Technology, PIC12F1822-E/P Datasheet - Page 170
PIC12F1822-E/P
Manufacturer Part Number
PIC12F1822-E/P
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Specifications of PIC12F1822-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC12F/LF1822/PIC16F/LF1823
REGISTER 19-1:
DS41413B-page 170
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
CxON
CxON: Comparator Enable bit
1 = Comparator is enabled and consumes no active power
0 = Comparator is disabled
CxOUT: Comparator Output bit
If CxPOL = 1 (inverted polarity):
1 = CxVP < CxVN
0 = CxVP > CxVN
If CxPOL = 0 (non-inverted polarity):
1 = CxVP > CxVN
0 = CxVP < CxVN
CxOE: Comparator Output Enable bit
1 = CxOUT is present on the CxOUT pin. Requires that the associated TRIS bit be cleared to actually
0 = CxOUT is internal only
CxPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
Unimplemented: Read as ‘0’
CxSP: Comparator Speed/Power Select bit
1 = Comparator operates in normal power, higher speed mode
0 = Comparator operates in low-power, low-speed mode
CxHYS: Comparator Hysteresis Enable bit
1 = Comparator hysteresis enabled
0 = Comparator hysteresis disabled
CxSYNC: Comparator Output Synchronous Mode bit
1 = Comparator output to Timer1 and I/O pin is synchronous to changes on Timer1 clock source.
0 = Comparator output to Timer1 and I/O pin is asynchronous.
CxOUT
R-0/0
drive the pin. Not affected by CxON.
Output updated on the falling edge of Timer1 clock source.
CMxCON0: COMPARATOR Cx CONTROL REGISTER 0
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CxOE
R/W-0/0
CxPOL
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
—
R/W-1/1
CxSP
2010 Microchip Technology Inc.
R/W-0/0
CxHYS
CxSYNC
R/W-0/0
bit 0
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