MIC5365-2.6YC5 TR Micrel Inc, MIC5365-2.6YC5 TR Datasheet - Page 5

• Manufacturer Part Number: MIC5365-2.6YC5 TR
• Description: Ultra Small Single 150mA LDO In SC-70 R
• Manufacturer: Micrel Inc

Specifications of MIC5365-2.6YC5 TR

• Regulator Topology: Positive Fixed
• Voltage - Output: 2.6V
• Voltage - Input: Up to 5.5V
• Voltage - Dropout (typical): 0.18V @ 150mA
• Number Of Regulators: 1
• Current - Output: 150mA
• Current - Limit (min): 200mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3317-2

SY540xxR/AR Family — Industry’s First Low
Voltage CML Family of Buffers, Multiplexers,
and Crosspoint Switches
This new family of seven new buffers, multiplexers, and crosspoint switches
can interface to 1.2/1.8V CML receivers. This family features unique,patent-
pending Fail Safe Input (FSI) circuitry and patented 3-pin internal termina-
tion. The multiplexers feature a patented Crosstalk isolation design. This
new family includes SY54011R fanout buffer, SY54016R/AR line drivers,
SY54017R/AR multiplexers, and SY54023R/AR crosspoint switches.
The SY54xxR/AR family can interface to FPGAs and ASICs that require 1.2V
or 1.8V CML signals. These products save over 50% power compared to
similar products. The FSI feature is optimized to prevent unwanted oscil-
lations and maintain output stability when an input signal swing collapses
or disappears. This feature is especially crucial for rack-based equipment
that has many I/O cards requiring Hot Swap capability. The 3-pin input ter-
mination simplifies designs and interfaces to any differential signal, AC- or
DC-coupled, without any level shifting or termination resistor networks in the
signal path. To further improve the jitter performance of SY54017R/AR and
SY54023R/AR, superior MUX input crosstalk isolation design is implement-
ed that reduces crosstalk by up to 70 percent.
This family offers AC performance that guarantees data rates up to 3.2Gbps
and clock frequency throughput up to 3.2GHz. Jitter performance is guar-
anteed to be less than 10ps
family guarantees operation over the full industrial temperature range –40°C
to +85°C. All solutions are available in MLF
inductance and capacitance, making the SY540xxR/AR family ideal for
today’s high-speed, low jitter designs.
SY54016R Block Diagram (Driver/Receiver)
SEL
(TTL/CMOS)
/IN0
/IN1
IN0
IN1
V
V
SY54017R Block Diagram (Multiplexer)
T0
T1
50Ω
50Ω
50Ω
50Ω
/IN
IN
V
50Ω
50Ω
T
PP
over temperature and voltage. The product
0
1
MUX
®
S
packages which feature low
/Q
Q
/Q0
Q0
Features
Applications
Family Description Table
Part Number
SY54011R
SY54016R
SY54016AR
SY54017R
SY54017AR
SY54023R
SY54023AR
•
•
•
•
•
•
•
•
•
•
SEL0
SEL1
SY54023R Block Diagram (Crosspoint Switch)
/IN0
/IN1
IN0
IN1
V
V
T0
T1
1.2V/1.8V CML Outputs
Ultra-low jitter design
2.5V ± 5%, 1.2/1.8V ± 5% power supply operation
Industrial temperature range: –40° to +85°C
Available in a 8-pin (2mm X 2mm) MLF
Available in a 16-pin (3mm X 2mm) MLF
SONET clock and data distribution
Fibre channel
Gigabit Ethernet
Storage and server
50Ω
50Ω
50Ω
50Ω
—
—
—
—
Description
1:2 Fanout
Line Driver/Receiver
Line Driver/Receiver
2:1 MUX
2:1 MUX
2x2 Crosspoint
2x2 Crosspoint
<1ps
<10ps
<1ps
<10ps
RMS
RMS
PP
PP
cycle-to-cycle jitter
random jitter
total jitter
deterministic jitter
(Gbps / GHz)
3.2 / 3.2
3.2 / 2.5
3.2 / 3.2
3.2 / 2.5
3.2 / 3.2
3.2 / 2.5
3.2 / 2.5
Speed
®
®
(SY54016R/AR)
(SY54011/17/23R/AR)
0
1
0
1
FSI
Yes
Yes
Yes
No
No
No
No
Package
3mm x 3mm
2mm x 2mm
2mm x 2mm
3mm x 3mm
3mm x 3mm
3mm x 3mm
3mm x 3mm
Q0
/Q0
Q1
/Q1
5