MCP6241T-E/MC Microchip Technology, MCP6241T-E/MC Datasheet - Page 12

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MCP6241T-E/MC

Manufacturer Part Number
MCP6241T-E/MC
Description
Single 1.8V, 550 KHz OP, E Temp 8 DFN 2X3mm T/R
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6241T-E/MC

Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
0.3 V/µs
Gain Bandwidth Product
550kHz
Current - Input Bias
1pA
Voltage - Input Offset
5000µV
Current - Supply
50µA
Current - Output / Channel
23mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-DFN
Number Of Channels
1
Voltage Gain Db
110 dB
Common Mode Rejection Ratio (min)
60 dB
Input Offset Voltage
5 mV
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details
MCP6241/1R/1U/2/4
A significant amount of current can flow out of the
inputs when the common mode voltage (V
ground (V
high impedance may need to limit the useable voltage
range.
4.1.3
The input stage of the MCP6241/1R/1U/2/4 op amps
use two differential CMOS input stages in parallel. One
operates at low common mode input voltage (V
while the other operates at high V
ogy, the device operates with V
V
4.2
The output voltage range of the MCP6241/1R/1U/2/4
op amps is V
(minimum) when R
V
4.3
Driving large capacitive loads can cause stability
problems for voltage-feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, but all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 70 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-4:
stabilizes large capacitive loads.
Figure 4-5
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit’s noise gain. For non-inverting gains, G
signal gain are equal. For inverting gains, G
1 + |Signal Gain| (e.g., –1 V/V gives G
DS21882D-page 12
DD
DD
V
IN
and 0.3V below V
= 5.5V. Refer to
Rail-to-Rail Output
Capacitive Loads
SS
NORMAL OPERATION
gives recommended R
); see
DD
MCP624X
+
– 35 mV (maximum) and V
L
Figure
= 10 kΩ is connected to V
Figure 2-14
SS
Output Resistor, R
ISO
.
2-19. Applications that are
in
Figure
R
L
ISO
CM
/G
for more information.
CM
C
N
up to 0.3V above
), where G
L
4-4) improves the
. WIth this topol-
ISO
N
= +2 V/V).
CM
SS
values for
ISO
) is below
N
DD
+ 35 mV
V
N
and the
OUT
/2 and
is the
N
CM
is
),
FIGURE 4-5:
for Capacitive Loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Evaluation on the bench and
simulations with the MCP6241/1R/1U/2/4 SPICE
macro model are very helpful. Modify R
the response is reasonable.
4.4
With this op amp, the power supply pin (V
single-supply) should have a local bypass capacitor
(i.e., 0.01 µF to 0.1 µF) within 2 mm for good high-
frequency performance. It can use a bulk capacitor
(i.e., 1 µF or larger) within 100 mm to provide large,
slow currents. This bulk capacitor can be shared with
other nearby analog parts.
4.5
An unused op amp in a quad package (MCP6244)
should be configured as shown in
circuits prevent the output from toggling and causing
crosstalk. Circuit A can use any reference voltage
between the supplies, provides a buffered DC voltage,
and minimizes the supply current draw of the unused
op amp. Circuit B minimizes the number of
components, but may draw a little more supply current
for the unused op amp.
FIGURE 4-6:
V
1.E+04
1.E+03
1.E+02
DD
¼ MCP6244 (A)
R
R
V
10k
100
1k
1.E+01
REF
1
2
10p
Supply Bypass
Unused Op Amps
=
Normalized Load Capacitance; C
V
V
DD
DD
ISO
------------------
R
1.E+02
100p
for your circuit, double-check the
1
R
Recommended R
Unused Op Amps.
+
2
© 2008 Microchip Technology Inc.
V
R
2
REF
G
G
N
N
= +1 V/V
≥ +2 V/V
1.E+03
1n
¼ MCP6244 (B)
Figure
ISO
L
/G
ISO
’s value until
V
N
DD
(F)
4-6. Both
Values
1.E+04
DD
10n
for

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