MCP14E5T-E/SN Microchip Technology, MCP14E5T-E/SN Datasheet - Page 12
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MCP14E5T-E/SN
Manufacturer Part Number
MCP14E5T-E/SN
Description
IC,Dual MOSFET Driver,CMOS,SOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Type
Low Sider
Datasheet
1.MCP14E5-EP.pdf
(26 pages)
Specifications of MCP14E5T-E/SN
Configuration
Low-Side
Input Type
Inverting and Non-Inverting
Delay Time
46ns
Current - Peak
4A
Number Of Configurations
2
Number Of Outputs
2
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Rise Time
30 ns
Fall Time
30 ns
Supply Voltage (min)
4.5 V
Supply Current
2 mA
Maximum Power Dissipation
665 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MCP14E5T-E/SNTR
MCP14E3/MCP14E4/MCP14E5
4.0
4.1
MOSFET drivers are high-speed, high current devices
which are intended to source/sink high peak currents to
charge/discharge the gate capacitance of external
MOSFETs or IGBTs. In high frequency switching power
supplies, the PWM controller may not have the drive
capability to directly drive the power MOSFET. A MOS-
FET driver like the MCP14E3/MCP14E4/MCP14E5
family can be used to provide additional source/sink
current capability.
An additional degree of control has been added to the
MCP14E3/MCP14E4/MCP14E5 family. There are
separate enable functions for each driver that allow for
the immediate termination of the output pulse
regardless of the state of the input signal.
4.2
The ability of a MOSFET driver to transition from a fully
off state to a fully on state are characterized by the
drivers rise time (t
delays (t
MCP14E5 family of drivers can typically charge and
discharge a 2200 pF load capacitance in 15 ns along
with a typical matched propagation delay of 50 ns.
Figure 4-1
timing waveform used to verify the MCP14E3/
MCP14E4/MCP14E5 timing.
FIGURE 4-1:
Waveform.
DS22062B-page 12
Output
Input
+5V
18V
0V
0V
Input
Input
APPLICATION INFORMATION
General Information
MOSFET Driver Timing
D1
10%
and
and t
90%
Figure 4-2
(1/2 MCP14E5)
V
MCP14E3
t
D1
R
10%
DD
), fall time (t
D2
= 18V
Inverting Driver Timing
). The MCP14E3/MCP14E4/
t
F
show the test circuit and
1 µF
F
), and propagation
C
L
t
Output
0.1 µF
Ceramic
= 2200 pF
D2
90%
t
R
10%
90%
FIGURE 4-2:
Waveform.
4.3
The ENB_A and ENB_B enable pins allow for indepen-
dent control of OUT A and OUT B respectively. They
are active high and are internally pulled up to V
that the default state is to enable the driver. These pins
can be left floating for normal operation.
When an enable pin voltage is above the enable pin
high threshold voltage, V
output is enabled and allowed to react to changes in
the INPUT pin voltage state. Likewise, when the enable
pin voltage falls below the enable pin low threshold
voltage, V
abled and does not respond the changes in the INPUT
pin voltage state. When the driver is disabled, the out-
put goes to a low state. Refer to
pin logic. The threshold voltages of the enable function
are compatible with logic levels. Hysteresis is provided
to help increase the noise immunity of the enable
function, avoiding false triggers of the enable signal
during driver switching. For robust designs, it is
recommended that the slew rate of the enable pin
signal be greater than 1 V/ns.
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, t
graphically represented in
Output
Input
+5V
18V
0V
0V
Input
Input
Enable Function
EN_L
10%
(2.0V typical), that driver output is dis-
(1/2 MCP14E5)
t
D1
V
MCP14E4
DD
90%
= 18V
Non-Inverting Driver Timing
© 2008 Microchip Technology Inc.
10%
EN_H
Figure
1 µF
t
(2.4V typical), that driver
R
4-3.
Table 4-1
C
L
Output
0.1 µF
Ceramic
= 2200 pF
t
90%
D3
D2
and t
10%
for enable
90%
D4
DD
, are
t
so
F