AM79C031JC AMD (ADVANCED MICRO DEVICES), AM79C031JC Datasheet - Page 27

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AM79C031JC

Manufacturer Part Number
AM79C031JC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM79C031JC

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Part Number
Manufacturer
Quantity
Price
Part Number:
AM79C031JC
Manufacturer:
AMD
Quantity:
491
COMMAND STRUCTURE
This section describes in detail each of the MPI commands. Each of the commands is shown along with the format
of any additional data bytes that follow. For details of the filter coefficients of the for C
Description of Coefficients section.
1. Deactivate (Standby State)
2. Software Reset
3. No Operation
4. Reset to Normal Conditions
5. Activate (Operational State)
(00h)
(02h)
(06h)
(08h)
(0Eh)
During the Inactive state (of one or more channels):
a)
b)
c)
d)
The software reset state of the device is:
a)
b)
c)
d)
e)
f)
g)
Reset to Normal Conditions performs the following operations:
a)
b)
c)
d)
This command places the device in the Active mode. No valid PCM data is transmitted until
after the second FS pulse is received following the execution of the Activate command.
Command
Command
Command
Command
Command
All of the programmed information is retained.
The Microprocessor Interface (MPI) remains active.
The PCM outputs are in high impedance and the PCM inputs are disabled.
The analog output is tied to 2.1 V through an internal resistor (~3 k ).
The channel is placed in the Inactive (standby) mode.
GX, GR, X, R, B, and Z filters are disabled with coefficients retained.
AX and AR are set to unity and AISN gain is set to 0.
The Adaptive B feature is disabled.
A-law is selected.
All SLIC I/O lines are configured as inputs.
Normal conditions are selected (see Command 4).
Does not insert 6 dB loss in receive path.
Receive and transmit paths are not cutoff.
High-pass filter is enabled.
Test modes are turned off.
SLAC Products
D
D
D
D
D
0
0
0
0
0
7
7
7
7
7
D
D
D
D
D
0
0
0
0
0
6
6
6
6
6
D
D
D
D
D
0
0
0
0
0
5
5
5
5
5
D
D
D
D
D
0
0
0
0
0
4
4
4
4
4
D
D
D
D
D
0
0
0
1
1
3
3
3
3
3
xy
m
xy
D
D
D
D
D
, please refer to the
0
0
1
0
1
2
2
2
2
2
D
D
D
D
D
0
1
1
0
1
1
1
1
1
1
D
D
D
D
D
0
0
0
0
0
0
0
0
0
0
27

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