WJLXT971ALE.A4 Cortina Systems Inc, WJLXT971ALE.A4 Datasheet - Page 71
WJLXT971ALE.A4
Manufacturer Part Number
WJLXT971ALE.A4
Description
Manufacturer
Cortina Systems Inc
Datasheet
1.WJLXT971ALE.A4.pdf
(96 pages)
Specifications of WJLXT971ALE.A4
Lead Free Status / RoHS Status
Compliant
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LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Table 37
Cortina Systems
10BASE-T Receive Timing Parameters
®
RXD, RX_DV, RX_ER Setup to
RX_CLK High
RXD, RX_DV, RX_ER Hold from
RX_CLK High
TPFIP/N in to RXD out (Rx latency)
CRS asserted to RXD, RX_DV,
RX_ER asserted
RXD, RX_DV, RX_ER de-asserted to
CRS de-asserted
TPFI in to CRS asserted
TPFI quiet to CRS de-asserted
TPFI in to COL asserted
TPFI quiet to COL de-asserted
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
LXT971A Single-Port 10/100 Mbps PHY Transceiver
testing.
rate. 10BASE-T bit time = 10
Parameter
-7
s or 100 ns.
Sym
t1
t2
t3
t4
t5
t6
t7
t8
t9
Min
4.2
0.3
10
10
5
2
6
1
5
Typ
–
–
–
–
–
–
–
–
–
1
Max
6.6
0.5
32
28
10
31
10
–
–
7.2 AC Timing Diagrams and
Units
BT
BT
BT
BT
BT
BT
BT
ns
ns
2
Test Conditions
Parameters
–
–
–
–
–
–
–
–
–
Page 71