FWLXT9784BE.A3 Cortina Systems Inc, FWLXT9784BE.A3 Datasheet - Page 45

• Manufacturer Part Number: FWLXT9784BE.A3
• Manufacturer: Cortina Systems Inc

Specifications of FWLXT9784BE.A3

• Lead Free Status / RoHS Status: Not Compliant

2.12.2
2.12.3
Datasheet
Table 22. Test Scan Chain
There are two NAND-Tree chains, with two separate inputs, assigned to UCA1 (Chain 1) and
COLED (chain 2), and two separate outputs, assigned to INT (Chain 1) and TOUT (Chain 2)
respectively.
To enable NAND-tree manufacturing test mode, set MODE[2:0] = "111", TCK = "0", TI = "0",
TEXEC = "1" and power-up or reset the chip. Toggling the chain input pin will be reflected at the
chain output after a delay of about 20ns.
XNOR-Tree Test
This command connects all the outputs of the input-buffers in the device periphery into a XNOR-
Tree scheme. All the I/O and outputs, except for MODE[2:0], TI, TEXEC, TCK, INT, and TOUT
pins, are put into a Tri-State mode.
There are two XNOR-Tree chains, with two separate inputs, assigned to UCA1 (Chain 1) and
COLED (chain 2), and two separate outputs, assigned to INT (Chain 1) and TOUT (Chain 2),
respectively.
In order to set up the device into XNOR tree manufacturing test mode set MODE[2:0] = "111",
TCK = "0", TI = "1", TEXEC = "0" and power-up or reset the chip. Toggling the chain input pin
will be reflected at the chain output after a delay of about 20 ns.
NAND/XNOR Tree Chain Order
A combination of “111” on the MODE_[2:0] pins indicates that the LXT9784 is configured to an
asynchronous test mode (NAND-TREE or XNOR-TREE). Test pins combinations for the
asynchronous test modes are:
MODE_[2:0] = “111”, TCK = “0”, TI= “0”, TEXEC =”1” for NAND - TREE
MODE_[2:0] = “111”, TCK = “0”, TI= “1”, TEXEC =”0” for XNOR - TREE
The NAND-TREE / XNOR-TREE commands connect all outputs of the input-buffers in the device
periphery into a
NAND-TREE / XNOR-TREE scheme. All the input/output pins and output pins except for:
MODE_[2.0], TI, TEXEC, TCK, INT#, and TOUT pins are put into a Tri-State mode.
There are two NAND-TREE / XNOR-TREE chains, with two separate outputs, assigned to INT#
(Chain 1) and TOUT (Chain 2).
The following table lists the chains order / direction (pin no. 1 in the chain, is the farthest from the
NAND-TREE / XNOR-TREE outputs).]
1
2
3
4
5
Chain Order
W1
W2
W3
V1
V2
Ball ID
TXD0_1
TXD0_1
TXEN0
CRSDV0
RXD0_1
Chain #1
Low-Power Octal PHY — LXT9784
W18
W19
W20
V18
V19
Ball ID
NC
NC
NC
NC
NC
Chain #2
45