FLLXT971ABC.A4-834926 Cortina Systems Inc, FLLXT971ABC.A4-834926 Datasheet - Page 87

• Manufacturer Part Number: FLLXT971ABC.A4-834926
• Manufacturer: Cortina Systems Inc

Specifications of FLLXT971ABC.A4-834926

• Lead Free Status / RoHS Status: Not Compliant

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Table 56
Table 57
Cortina Systems
Configuration Register - Address 16, Hex 10 (Sheet 2 of 2)
Status Register #2 - Address 17, Hex 11 (Sheet 1 of 2)
®
1. R/W = Read /Write
1. RO = Read Only. R/W = Read/Write
16.4:3
17.15
17.14
17.13
17.12
17.10
17.11
16.8
16.7
16.6
16.5
16.2
16.1
16.0
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Bit
Bit
TP Loopback
(10BASE-T)
CRS Select
(10BASE-T)
Sleep Mode
PRE_EN
Sleep Timer
Fault Code Enable
Alternate NP feature
Fiber Select
Reserved
10/100 Mode
Transmit Status
Receive Status
Collision Status
Link
Name
Name
0 = Normal operation
1 = Disable TP loopback during half-duplex
0 = Normal Operation
1 = CRS deassert extends to RX_DV deassert
0 = Disable Sleep Mode
1 = Enable Sleep Mode
Note:
Preamble Enable.
0 = Set RX_DV high coincident with SFD.
1 = Set RX_DV high and RXD = preamble when
Note:
00 = 3.04 seconds
01 = 2.00 seconds
10 = 1.04 seconds
11 = unused
0 = Disable FEFI transmission
1 = Enable FEFI transmission
0 = Disable alternate auto negotiate next page
1 = Enable alternate auto negotiate next page
Note:
0 = Select TP mode.
1 = Select fiber mode.
Note:
Always 0.
0 = LXT971A PHY is not operating 100BASE-TX
1 = LXT971A PHY is operating in 100BASE-TX
0 = LXT971A PHY is not transmitting a packet.
1 = LXT971A PHY is transmitting a packet.
0 = LXT971A PHY is not receiving a packet.
1 = LXT971A PHY is receiving a packet.
0 = No collision.
1 = Collision is occurring.
0 = Link is down.
1 = Link is up.
operation
CRS is asserted.
feature.
feature.
mode.
mode.
Default value is determined by state of
SLEEP pin 32/H7
Preamble is always enabled in 100 Mbps
operation.
This bit enables or disables the register
bit 6.5 capability.
Default value is determined by state of pin
26/G2 (SD/TP_L).
Description
Description
Product-Specific Registers
9.0 Register Definitions -
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
1
1
Default
Default
Page 87
00
—
—
0
1
0
1
0
0
0
0
0
0
0