SI3056-D-FSR Silicon Laboratories Inc, SI3056-D-FSR Datasheet - Page 76

• Manufacturer Part Number: SI3056-D-FSR
• Description: Modem Chip Chipset 56Kbps 16-Pin SOIC T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3056-D-FSR

• Package: 16SOIC
• Main Category: Chipset
• Maximum Data Rate: 56 Kbps
• Typical Operating Supply Voltage: 3.3 V
• Power Supply Type: Analog
• Typical Supply Current: 15 mA
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V
• Lead Free Status / RoHS Status: Compliant

Si3018/19/10
Register 41. RX Gain Control 3 (Si3019 Line-Side Device Only)
Reset settings = 0000_0000
Register 42. Reserved
Reset settings = 0000_0000
76
Bit
7:5
3:0
Bit
7:0
Name
Name
Type
4
Type
Bit
Bit
RXG3[3:0] Receive Gain 3.
Reserved Read returns zero.
Reserved Read returns zero.
Name
RGA3
Name
D7
D7
Receive Gain or Attenuation 2.
0 = Incrementing the RXG3[3:0] bits results in gaining up the receive path.
1 = Incrementing the RXG3[3:0] bits results in attenuating the receive path.
Each bit increment represents 0.1 dB of gain or attenuation, up to a maximum of 1.5 dB.
For example:
RGA3
X
0
0
0
1
1
1
D6
D6
D5
D5
RXG3[3:0]
0000
0001
1111
0001
1111
:
:
RGA3
R/W
D4
D4
D3
D3
Rev. 1.05
Result
0 dB gain or attenuation is applied to the receive path.
0.1 dB gain is applied to the receive path.
1.5 dB gain is applied to the receive path.
0.1 dB attenuation is applied to the receive path.
1.5 dB attenuation is applied to the receive path.
D2
D2
RXG3[3:0]
Function
Function
R/W
D1
D1
D0
D0