HBSK70744HE.B2 S E001 Intel, HBSK70744HE.B2 S E001 Datasheet - Page 36

• Manufacturer Part Number: HBSK70744HE.B2 S E001
• Manufacturer: Intel

Specifications of HBSK70744HE.B2 S E001

• Main Category: Chipset
• Power Supply Type: Analog/Digital
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

SK70740/44 — HDSL2 Modem Chip Set
4.6
36
Figure 17. HDSL2 PSD Mask for North America
The PAM Transceiver and AFE work together to provide the D/A function. Data from the transmit
filter is first passed through a multistage Delta-Sigma modulator. The modulator runs off the
REFCLK input from the AFE and over-samples the data at approximately 48X. The output is a
pulse width modulated data stream that is passed to the AFE across the DAC<3:0> interface.
Transfers are synchronized with the rising edge of the REFCLK line. Subsequent filtering within
the AFE removes quantization noise.
Receiver
The combined functions of the PAM Transceiver and the AFE provide the A/D function. A
multistage Delta Sigma modulator in the AFE over-samples the incoming signal and produces a
pulse width modulated data stream. The data is sent to the transceiver across the ADC<5:0> lines.
Transfers are synchronized with the rising edge of the REFCLK line.
At the Transceiver input, a decimation filter removes out-of-band energy and effectively recovers
the signal from the pulse width modulated input. Subsequent to the decimation filter, an Echo
Cancellation (EC) block subtracts the transmitted signal from the received data path. The EC filter
has a multi-tap structure and the coefficients are adjusted during the activation sequence. Once
setup, the coefficients of the EC adaptively adjust to changes in the input signal.
-100
-30
-40
-50
-60
-70
-80
-90
0
100
200
Upstream
300
400
Frequency (kHz)
500
600
700
Downstream
800
900
Datasheet
1000