LAN8700C-AEZG-TR Standard Microsystems (SMSC), LAN8700C-AEZG-TR Datasheet - Page 17

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LAN8700C-AEZG-TR

Manufacturer Part Number
LAN8700C-AEZG-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN8700C-AEZG-TR

Number Of Receivers
1
Data Rate
10/100Mbps
Operating Supply Voltage (typ)
3.3V
Package Type
QFN EP
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant

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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR
Datasheet
SMSC LAN8700/LAN8700i
SIGNAL NAME
SIGNAL NAME
SIGNAL NAME
VDD_CORE
VDDA3.3
EXRES1
VDD33
VDDIO
VSS
RXN
TXN
RXP
TXP
POWER
POWER
POWER
POWER
POWER
TYPE
TYPE
TYPE
AO
AO
Table 3.6 10/100 Line Interface
AI
AI
AI
Table 3.7 Analog References
Table 3.8 Power Signals
DATASHEET
Transmit Data Positive: 100Base-TX or 10Base-T differential
transmit outputs to magnetics.
Transmit Data Negative: 100Base-TX or 10Base-T differential
transmit outputs to magnetics.
Receive Data Positive: 100Base-TX or 10Base-T differential
receive inputs from magnetics.
Receive Data Negative: 100Base-TX or 10Base-T differential
receive inputs from magnetics.
Connects to reference resistor of value 12.4K-Ohm, 1%
connected as described in the Analog Layout Guidelines. The
nominal voltage is 1.2V and therefore the resistor will dissipate
approximately 1mW of power.
+1.6V to +3.6V Variable I/O Pad Power
+3.3V Core Regulator Input.
+3.3V Analog Power
+1.8V (Core voltage) - 1.8V for digital circuitry on chip. Supplied
by the on-chip regulator unless configured for regulator off
mode using the RX_CLK/REGOFF pin. Place a 0.1uF capacitor
near this pin and connect the capacitor from this pin to ground.
When using the on-chip regulator, place a 4.7uF ±20%
capacitor with ESR < 1ohm near this pin and connect the
capacitor from this pin to ground. X5R or X7R ceramic
capacitors are recommended since they exhibit an ESR lower
than 0.1ohm at frequencies greater than 10kHz.
Exposed Ground Flag. The flag must be connected to the
ground plane with an array of vias as described in the Analog
Layout Guidelines
®
17
Technology in a Small Footprint
DESCRIPTION
DESCRIPTION
DESCRIPTION
Revision 2.2 (12-04-09)

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