NSK70721PE.C2 S E001 Intel, NSK70721PE.C2 S E001 Datasheet - Page 5

• Manufacturer Part Number: NSK70721PE.C2 S E001
• Manufacturer: Intel

Specifications of NSK70721PE.C2 S E001

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Not Compliant

Tables
Datasheet
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IAFE Pin Assignments/Signal Descriptions........................................................... 9
EDSP Pin Assignments/Signal Descriptions .......................................................11
2B1Q Pulse Coding Rule ....................................................................................18
EDSP/IAFE Serial Control Port Word Bit Definitions...........................................20
EMDP Data Mode Selection................................................................................22
Min, Max and alternate bit stuffed frame timing and Payload data rate ..............25
Register Summary...............................................................................................26
Main Control Register (WR0) ..............................................................................27
Interrupt Mask and Line Reversal Control Register (WR2) .................................28
Master Activation Timer Constant (MATC) (WR3) ..............................................28
Coefficient Select Functions of Register (WR3) ..................................................28
Gain Control Register (WR9) ..............................................................................29
Micro-interruption Timer Register (MITR)............................................................30
Activation Sub-State Timer Registers .................................................................30
Main Status Register (RD0) ................................................................................30
AGC Tap Value Register (RD1) ..........................................................................32
Noise Margin Register (RD2) ..............................................................................32
Coefficient Read Registers (RD3 and RD4)........................................................33
Activating Status Register (RD5).........................................................................33
Activation State, Receiver AGC and FFE Step Gain Register (RD6)..................34
Data Pump Activation State ................................................................................35
EMDP Mode Dependent Activation Signal State ................................................48
Details of Activating State ...................................................................................49
Activating Sub-state Timers ................................................................................53
Master Activation Timer Examples......................................................................54
State Machine Default Timer Durations
Activation and Synchronization States ................................................................55
MIT Register Setting Example.............................................................................59
Components for Typical Application
Components for Typical Application
Typical Transformer Specifications
Typical Crystal Specifications
Typical Clock Oscillator Specifications................................................................68
IAFE Absolute Maximum Ratings........................................................................69
IAFE Recommended Operating Conditions ........................................................69
IAFE DC Electrical Characteristics (Over Recommended Range)......................69
IAFE Transmitter Electrical Parameters (Over Recommended Range)..............70
IAFE Receiver Electrical Parameters (Over Recommended Range) ..................71
EDSP Absolute Maximum Ratings......................................................................73
EDSP Recommended Operating Conditions ......................................................74
EDSP DC Electrical Characteristics (Over Recommended Range)....................74
EMDP Data Interface Timing Specifications .......................................................74
EDSP/Microprocessor Interface Timing Specifications .......................................77
General System and Hardware Mode Timing .....................................................80
Acronyms ............................................................................................................82
Enhanced Multi-Rate DSL Data Pump Chip Set — SK70725/SK70721
(Figure 26
(Figure 26
(Figure
(Figure
(Figure 18
and
26) .................................................65
27) .................................................67
Figure
and
and
Figure
27)....................................68
Figure
27) ...........................67
19).....................55
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