TK5552A-PP Atmel, TK5552A-PP Datasheet - Page 18

• Manufacturer Part Number: TK5552A-PP
• Manufacturer: Atmel

Specifications of TK5552A-PP

• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

8.7.3
8.8
8.8.1
8.8.2
18
Error Handling
TK5552
Programming
Errors During EEPROM Programming
Errors During Data Transmission
When the bit decoder and controller detect a valid data stream, the transponder IC will start an
erase and programming cycle if a data write command was decoded (see
17).
During the erase and programming cycle, downlink damping is turned off. The programming
cycle includes a data verification read to check the integrity of the data. When EEPROM pro-
gramming and verification have been finished successfully, the Transponder IC enters uplink
mode, transmitting the block just programmed.
The typical programming time is
Several error conditions are detected by the transponder IC to ensure that only valid information
is programmed into the EEPROM.
There are two types of errors which will lead to dedicated actions.
The following errors are detected by the decoder:
If any of these conditions is detected, the transponder IC enters uplink mode starting with
block 1.
• Verification error
• Block write protection
• Bit error
• Frame error
If one of the data verification cycles fails, the transponder IC will inhibit modulation and will
not return to the uplink mode. This modulation defeat state is terminated by re-entering the
downlink mode with a start gap.
If the lock bit of the addressed block is set, programming is disabled. In this case, the pro-
gramming cycle is not initiated and the transponder IC reverts to uplink mode, transmitting
the currently addressed (and unmodified) block continuously.
Wrong number of field clocks between two gaps (i.e., not a valid 0 or 1 pulse stream).
The number of data bits received is incorrect:
– Valid bit count for 3-bit address write is 38 bits
– Valid bit count for 5-bit address write is 40 bits
– 7 bits for a direct access command
18 ms.
Figure 8-11 on page
4698B–RFID–08/05