PEF20525FV13XT Lantiq, PEF20525FV13XT Datasheet - Page 91
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PEF20525FV13XT
Manufacturer Part Number
PEF20525FV13XT
Description
Manufacturer
Lantiq
Datasheet
1.PEF20525FV13XT.pdf
(252 pages)
Specifications of PEF20525FV13XT
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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PEB 20525
PEF 20525
Detailed Protocol Description
In standard applications, CRC-CCITT algorithm is used. The Frame Check Sequence at
the end of each frame consists of two bytes of CRC checksum.
If required, the CRC-CCITT algorithm can be replaced by the CRC-32 algorithm,
enabled via bit ’C32’ in register CCR1L. In this case the Frame Check Sequence
consists of four bytes.
Optionally the internal handling of received and transmitted CRC checksum can be
influenced via control bits ’RCRC’, ’DRCRC’ in register
CCR3H
and ’XCRC’ in register
CCR2H.
Receive direction:
If not disabled by setting bit ’DRCRC’ (register CCR3H), the received CRC checksum is
always assumed to be in the 2 (CRC-CCITT) or 4 (CRC-32) last bytes of a frame,
immediately preceding a closing flag. If bit ’RCRC’ is set, the received CRC checksum
is treated as data and will be forwarded to the RFIFO, where it precedes the frame status
byte. Nevertheless the received CRC checksum is additionally checked for correctness.
If CRC checking is disabled with bit CCR3H:DRCRC, the limits for ‘Valid Frame’ check
are modified accordingly (refer to description of the Receive Status Byte, RSTA:VFR).
Transmit direction:
If bit ’XCRC’ is set, the CRC checksum is not generated internally. The checksum has to
be provided via the transmit data buffer by software. The transmitted frame will only be
closed automatically with a (closing) flag.
Note: The SCC does not check whether the length of the frame, i.e. the number of bytes,
to be transmitted makes sense or not according the HDLC protocol.
4.1.8
Receive Length Check Feature
The SCC offers the possibility to supervise the maximum length of received frames and
to terminate data reception in the case that this length is exceeded.
This feature is controlled via the special Receive Length Check Registers RLCRL/
RLCRH.
The function is enabled by setting bit ’RCE’ (Receive Length Check Enable) and the
maximum frame length to be checked is programmed via bit field ’RL’. The maximum
receive length can be determined as a multiple of 32-byte blocks as follows:
MAX_LENGTH = (RL + 1) ´ 32 ,
where RL is the value written to bit field ’RL’. Thus, the maximum length of receive
frames can be programmed between 32 and 65536 bytes.
All frames exceeding this length are treated as if they had been aborted by the remote
station, i.e. the CPU is informed via
– an ’RME’ interrupt generated by the SCC, and
– the receive abort indication ’RAB’ in the Receive Status Byte (RSTA).
Data Sheet
91
2000-09-14
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