KSZ8864RMN Micrel Inc, KSZ8864RMN Datasheet - Page 12
KSZ8864RMN
Manufacturer Part Number
KSZ8864RMN
Description
IC ETHERNET SW 4PORT 64QFN
Manufacturer
Micrel Inc
Datasheet
1.KSZ8864RMN.pdf
(112 pages)
Specifications of KSZ8864RMN
Controller Type
Ethernet Switch Controller
Interface
MII, RMII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Supplier Unconfirmed
Current - Supply
-
Lead Free Status / RoHS Status
Supplier Unconfirmed, Lead free / RoHS Compliant
Other names
576-3787
KSZ8864RMN
KSZ8864RMN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8864RMNI
Manufacturer:
MICREL
Quantity:
7 143
Company:
Part Number:
KSZ8864RMNUB
Manufacturer:
MICREL
Quantity:
101
Micrel, Inc.
KSZ8864RMN
List of Tables
Table 1. MDI/MDI-X Pin Definitions ............................................................................................................................. 23
Table 2. Internal Function Block Status ........................................................................................................................ 27
Table 3. Switch MAC 3 SW3-MII and MAC 4 SW4- MII Signals.................................................................................. 33
Table 4. MAC3 SW3-RMII and MAC4 SW4-RMII Connection..................................................................................... 35
Table 5. Tail Tag Rules ................................................................................................................................................. 39
Table 6. FID+DA Look-Up in the VLAN Mode ............................................................................................................. 41
Table 7. FID+SA Look-Up in the VLAN Mode.............................................................................................................. 41
Table 8. SPI Connections ............................................................................................................................................ 44
Table 9. MII Management Interface Frame Format ..................................................................................................... 46
Table 10. Serial Management Interface (SMI) Frame Format ..................................................................................... 46
Table 11. 100BT Rate Selection for the Rate limit....................................................................................................... 82
Table 12. 10BT Rate Selection for the Rate Limit........................................................................................................ 83
Table 13. Static MAC Address Table ........................................................................................................................... 86
Table 14. VLAN Table .................................................................................................................................................. 88
Table 15. VLAN ID and Indirect Registers ................................................................................................................... 89
Table 16. Dynamic MAC Address Table ...................................................................................................................... 90
Table 17. Port-1 MIB Counter Indirect Memory Offsets............................................................................................... 92
Table 18. Format of “Per Port” MIB Counter ................................................................................................................ 93
Table 19. All Port Dropped Packet MIB Counters........................................................................................................ 93
Table 20. Format of “All Dropped Packet” MIB Counter .............................................................................................. 93
Table 21. EEPROM Timing Parameters .................................................................................................................... 101
Table 22. MAC Mode MII Timing Parameters............................................................................................................ 102
Table 23. PHY Mode MII Timing Parameters ............................................................................................................ 103
Table 24. RMII Timing Parameters ............................................................................................................................ 104
Table 25. SPI Input Timing Parameters ..................................................................................................................... 105
Table 26. SPI Output Timing Parameters .................................................................................................................. 106
Table 27. Auto-Negotiation Timing Parameters ......................................................................................................... 107
Table 28. MDC/MDIO Typical Timing Parameters..................................................................................................... 108
Table 29. Reset Timing Parameters .......................................................................................................................... 109
Table 30. Transformer Selection Criteria ................................................................................................................... 111
Table 31. Qualified Magnetic Vendors ....................................................................................................................... 111
Table 32. Typical Reference Crystal Characteristics ................................................................................................. 111
12
January 2011
M9999-012011-1.2