LAN9303I-ABZJ Standard Microsystems (SMSC), LAN9303I-ABZJ Datasheet - Page 103
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LAN9303I-ABZJ
Manufacturer Part Number
LAN9303I-ABZJ
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9303I-ABZJ.pdf
(366 pages)
Specifications of LAN9303I-ABZJ
Number Of Primary Switch Ports
3
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
7.3.1.1
7.3.1.2
Auto-Negotiation Link Partner Base Page Ability Register (VPHY_AN_LP_BASE_ABILITY)
specified in the IEEE 802.3 standard. The technology ability bits of these registers are ANDed, and if
there are multiple bits in common, the priority is determined as follows:
For example, if the full capabilities of the Virtual PHY are advertised (100Mbps, Full Duplex), and if
the link partner is capable of 10Mbps and 100Mbps, then auto-negotiation selects 100Mbps as the
highest performance mode. If the link partner is capable of half and full-duplex modes, then auto-
negotiation selects full-duplex as the highest performance operation. In the event that there are no bits
in common, an emulated
The
ability bits set. These values can be reconfigured via software. Once the auto-negotiation is complete,
any change to the
affect until the auto-negotiation process is re-run. The emulated link partner default advertised abilities
i n t h e
(VPHY_AN_LP_BASE_ABILITY)
and
Auto-Negotiation Link Partner Base Page Ability Register (VPHY_AN_LP_BASE_ABILITY)," on
page
faults, or 100BASE-T4.
Note: The P0_DUPLEX, duplex_pol_strap_0, and
If there is at least one common selection between the emulated link partner and the Virtual PHY
advertised abilities, then the auto-negotiation succeeds, the
the
ability bits in the
(VPHY_AN_LP_BASE_ABILITY)
Note: For the Virtual PHY, the auto-negotiation register bits (and management of such) are used by
Parallel Detection
In the event that there are no common bits between the advertised ability and the emulated link
partners ability, auto-negotiation fails and emulated parallel detect is used. In this case, the
Partner Auto-Negotiation Able
(VPHY_AN_EXP)
by the
Auto-Negotiation Link Partner Base Page Ability Register (VPHY_AN_LP_BASE_ABILITY)
indicating the emulated parallel detect result.
Disabling Auto-Negotiation
Auto-negotiation can be disabled in the Virtual PHY by clearing the
of the
speed of operation to reflect the speed
(Duplex Mode (VPHY_DUPLEX)
The speed and duplex bits in the
ignored when auto-negotiation is enabled.
100Mbps Full Duplex (highest priority)
100Mbps Half Duplex
10Mbps Full Duplex
10Mbps Half Duplex (lowest priority)
Virtual PHY Auto-Negotiation Expansion Register (VPHY_AN_EXP)
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
speed_strap_0
178. Neither the Virtual PHY or the emulated link partner support next page capability, remote
Virtual PHY Basic Control Register
speed_strap_0
Auto-negotiation is not automatically re-evaluated if these inputs are changed.
the PMI. So the perception of local and link partner is reversed. The local device is the PMI,
while the link partner is the Switch Fabric. This is consistent with the intention of the Virtual
PHY.
V i r t u a l P H Y A u t o - N e g o t i a t i o n L i n k P a r t n e r B a s e P a g e A b i l i t y R e g i s t e r
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
will be cleared, and the communication set to half-duplex. The speed is determined
configuration straps as described in
Virtual PHY Auto-Negotiation Link Partner Base Page Ability Register
configuration strap. Only one of the technology ability bits in the
Parallel Detection
bit) of the
are set to indicate the emulated link partners abilities.
are dependant on the P0_DUPLEX pin and the
Virtual PHY Basic Control Register (VPHY_BASIC_CTRL)
bit of the
DATASHEET
(Speed Select LSB (VPHY_SPEED_SEL_LSB)
103
(VPHY_BASIC_CTRL). The Virtual PHY will then force its
Virtual PHY Basic Control Register
is used.
Virtual PHY Auto-Negotiation Expansion Register
speed_strap_0
Table 13.7
Link Partner Auto-Negotiation Able
inputs are considered to be static.
of
Auto-Negotiation (VPHY_AN)
Section 13.2.6.6, "Virtual PHY
is set, and the technology
defaults to having all four
(VPHY_BASIC_CTRL).
Revision 1.3 (08-27-09)
duplex_pol_strap_0
bit) and duplex
Virtual PHY
will not take
will be set,
should be
bit of
Link
as
bit
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