LAN9311I-NZW Standard Microsystems (SMSC), LAN9311I-NZW Datasheet - Page 251
LAN9311I-NZW
Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9311I-NZW.pdf
(460 pages)
Specifications of LAN9311I-NZW
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number:
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.8.3
31:16
BITS
15:0
RESERVED
(See
PHY ID
This field contains the MSB of the Virtual PHY OUI
Virtual PHY Identification MSB Register (VPHY_ID_MSB)
This read/write register contains the MSB of the Virtual PHY Organizationally Unique Identifier (OUI).
The LSB of the Virtual PHY OUI is contained in the
(VPHY_ID_LSB).
Note 14.23 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on
Note 14.24 IEEE allows a value of zero in each of the 32-bits of the PHY Identifier.
Note
14.23)
Offset:
Index (decimal):
a DWORD boundary. When accessed serially (through the MII management protocol), the
register is 16-bits wide.
1C8h
2
DESCRIPTION
DATASHEET
251
Size:
(Note
14.24).
Virtual PHY Identification LSB Register
32 bits
TYPE
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
0000h
-
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