ZT8101 Intel (CPU), ZT8101 Datasheet - Page 19
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ZT8101
Manufacturer Part Number
ZT8101
Description
Manufacturer
Intel (CPU)
Datasheet
1.ZT8101.pdf
(78 pages)
Specifications of ZT8101
Lead Free Status / RoHS Status
Supplier Unconfirmed
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4.7.1
4.7.2
4.7.3
Intel
®
Table 3.
NetStructure
Note: If flow control is enabled, a small amount of low priority traffic may be forwarded before high
MAC Address Priority
The frames can be prioritized based on whether the MAC address appears in:
Frames that match the criteria are given a priority tag.
Priority Tags
The IEEE 802.1p specification defines a priority tag that is used to classify the frame’s forwarding
priority. There are eight levels of priority which range is from 0 – 7, with priority 7 as the highest
priority.
The switch supports only four hardware priority levels per port, so the eight levels are mapped to
four as listed in the table below.
Hardware Priority Levels Per Port
Scheduling
After an Ethernet frame has been prioritized, the switch forwards the Ethernet frame using the strict
priority-based scheduling algorithm. With this policy, any packets residing in a higher priority
queue are always transmitted first. Only when these queues are empty are packets in lower priority
queues transmitted. This scheme can potentially starve packets in lower-priority queues.
priority traffic.
0 - 1
2 - 3
4 - 5
6 - 7
•
•
•
TM
the source only
the destination only
both the source and destination
ZT 8101 10/100 Ethernet Switch Technical Product Specification
Priority in Frames
0
1
2
3
Priority Queue of ASIC
Layer 2 Switch Features
19
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