LMH6582YA National Semiconductor, LMH6582YA Datasheet - Page 14

• Manufacturer Part Number: LMH6582YA
• Manufacturer: National Semiconductor

Specifications of LMH6582YA

• Array Configuration: 16x8
• Number Of Arrays: 1
• Screening Level: Industrial
• Pin Count: 64
• Package Type: TQFP EP
• Power Supply Requirement: Dual
• Lead Free Status / RoHS Status: Not Compliant

www.national.com
THERMAL MANAGEMENT
The LMH6582 is packaged in a thermally enhanced Quad Flat
Pack package. Even so, it is a high performance device that
produces a significant amount of heat. With a ±5V supply, the
LMH6582 will dissipate approximately 1.1W of idling power
with all outputs enabled. Idling power is calculated based on
the typical supply current of 110 mA and a 10V supply voltage.
This power dissipation will vary with the range of 800 mW to
1.4W due to process variations. In addition, each equivalent
video load (150Ω) connected to the outputs should be bud-
geted 30 mW of power. For a typical application with one
video load for each output this would be a total power of 1.14
W. With a θ
C over the ambient temperature. A more aggressive applica-
tion would be two video loads per output which would result
in 1.38W of power dissipation. This would result in a 37°C
temperature rise. For heavier loading, the QFP package ther-
mal performance can be significantly enhanced with an ex-
ternal heat sink and by providing for moving air ventilation.
Also, be sure to calculate the increase in ambient temperature
from all devices operating in the system case. Because of the
high power output of this device, thermal management should
be considered very early in the design process. Generous
JA
of 27°C/W this will result in the silicon being 31°
14
passive venting and vertical board orientation may avoid the
need for fan cooling or heat sinks. Also, the LMH6582 can be
operated with a ±3.3V power supply. This will cut power dis-
sipation substantially while only reducing bandwidth by about
10% (2 V
factory tested at the ±3.3V power supply condition for appli-
cations where reduced power is desired.
PRINTED CIRCUIT LAYOUT
Generally, a good high frequency layout will keep power sup-
ply and ground traces away from the input and output pins.
Parasitic capacitances on these nodes to ground will cause
frequency response peaking and possible circuit oscillations
(see Application Note OA-15 for more information). If digital
control lines must cross analog signal lines (particularly in-
puts) it is best if they cross perpendicularly. National Semi-
conductor suggests the following evaluation boards as a
guide for high frequency layout and as an aid in device testing
and characterization:
Device
LMH6582
PP
output). The LMH6582 is fully characterized and
Package
64-Pin TQFP
Evaluation Board
Part Number
LMH730156