PI6C487016FBE Pericom Semiconductor, PI6C487016FBE Datasheet

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PI6C487016FBE

Manufacturer Part Number
PI6C487016FBE
Description
Clock Drivers & Distribution 1to16 LVCMOS/LVTTL Clock Drive
Manufacturer
Pericom Semiconductor
Type
Clock Dividerr
Datasheet

Specifications of PI6C487016FBE

Number Of Clock Inputs
2
Output Logic Level
LVCMOS/LVTTL
Output Frequency
250MHz
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
LQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Max Output Freq
250 MHz
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Temperature
+ 85 C
Package / Case
LQFP-48
Lead Free Status / RoHS Status
Compliant
Product Features
• 16 LVCMOS/LVTTL outputs (4 banks of 4 outputs)
• Selectable differential or single-ended clock inputs
• CLK1, nCLK1 pair can accept the following differential input
• CLK0 supports the following input types: LVCMOS, LVTTL
• Maximum output frequency: 250MHz
• Independent bank control for ÷1 or ÷2 operation
• Independent output bank voltage settings for 3.3V, 2.5V, or
• Output skew: 170ps (max)
• Bank skew: 30ps (max)
• Part-to-part skew: 750ps (max)
• 3.3V core, 3.3V, 2.5V, or 1.8V output operating supply
• -40° to +85°C ambient operating temperature
• Available packages:
Block Diagram
levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
1.8V operations
-Pb-free & green 48-pin LQFP(FB)
CLK_SEL
nMR/OE
nCLK1
SELC
SELD
CLK0
CLK1
SELA
SELB
ENA
ENB
ENC
END
10-0008
0
1
÷1
÷2
1
0
1
0
1
0
1
0
D
LE
D
LE
D
LE
D
LE
4
4
4
4
QA0:QA3
QB0:QB3
QC0:QC3
QD0:QD3
1
Product Description
The PI6C487016 is a low skew. 1:16 LVCMOS/LVTTL Clock
Driver. The device has 4 banks of 4 outputs and each bank can be
independently selected for ÷1 or ÷2 frequency operation. Each bank
also has its own power supply pins so that the banks can operate
at the following different voltage levels: 3.3V, 2.5V, and 1.8V. The
low impedance LVCMOS/LVTTL outputs are designed to drive
50Ω series or parallel terminated transmission lines.
The divide select inputs, SELA: SELD, control the output frequency
of each bank with either ÷1 or ÷2 frequency operation. The bank
enable inputs, ENA: END, support enabling and disabling each bank
of outputs individually. The outputs synchronized when enabling
or disabling the clock outputs. The master reset input nMR/OE,
resets the ÷1/÷2 fl ip fl ops and also controls the active and high
impedance states of all outputs.
The PI6C487016 is characterized to operate with the core at 3.3V
and the output banks at 3.3V, 2.5V or 1.8V.
Pin Description
nMR/OE
SELC
SELD
CLK0
SELA
SELB
GND
ENC
END
ENA
ENB
V
DD
LVCMOS / LVTTL Clock Driver
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
Low Skew, 1-to-16
PI6C487016
PS8741D
36
35
34
33
32
31
30
29
28
27
26
25
GND
QB0
V
QB1
GND
QB2
V
QB3
GND
QC0
V
QC1
DDOB
DDOB
DDOC
01/12/10

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PI6C487016FBE Summary of contents

Page 1

Product Features • 16 LVCMOS/LVTTL outputs (4 banks of 4 outputs) • Selectable differential or single-ended clock inputs • CLK1, nCLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • CLK0 supports the following input ...

Page 2

Pin Descriptions Number Name Type Power DD 2 CLK0 Input SELA : Input SELD ENA : END Input 11 nMR/OE Input 12, 16, 20, 24, 28, 32, 36, 40, ...

Page 3

Absolute Maximum Ratings Supply Voltage, VDD ....................... 4.6V Inputs ...................................................... Outputs .................................................. Package Thermal Impedance, Ø JA ..... Storage Temperature, T STG ................... Pin Characteristics Symbol Parameter C Input Capacitance IN R Input Pulldown Resistor PULLDOWN ...

Page 4

LVCMOS/LVTTL DC Characteristics, Symbol Parameter SELx, ENX, nMR/OE, CLK_SEL V Input High Voltage IH CLK0 SELx, ENx, nMR/OE, CLK_SEL V Input Low Voltage IL CLK0 ENx, SELx, nMR/OE I Input High Current IH CLK0, CLK_SEL ENx, SELx, nMR/OE I Input ...

Page 5

V AC Characteristics, DD Symbol Parameter f Output Frequency MAX CLK0 CLK1, nCLK1 CLK0 Propagation Delay Low to High CLK1, nCLK1 CLK0 CLK1, nCLK1 (3) tsk(b) Bank skew (4) tsk(o) Output skew (5) tsk(pp) ...

Page 6

Parameter Measurement Information 1.65V± DDOx LVCMOS GND -1.65V±5% 3.3V Core/3.3V Output Load AC Test Circuit 2.4±0.9V +0.9V± DDOx LVCMOS GND = -0.9V±5% 3.3V Core/1.8V Output Load AC Test Circuit 10-0008 2.05V±5% SCOPE V ...

Page 7

Application Information Wiring the differential input to accept single ended levels Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = VDD/2 is generated by the bias resistors R1, R2 ...

Page 8

... Note: • For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information Ordering Code PI6C487016FBE Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • Pb-free and Green • Adding an X suffi Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • http://www.pericom.com ...

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