LFE2M20E-6FN484C LATTICE SEMICONDUCTOR, LFE2M20E-6FN484C Datasheet - Page 385
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LFE2M20E-6FN484C
Manufacturer Part Number
LFE2M20E-6FN484C
Description
FPGA LatticeECP2M Family 19000 Cells 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2M20E-6FN484C
Package
484FBGA
Family Name
LatticeECP2M
Device Logic Units
19000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
304
Ram Bits
1246208
Available stocks
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© 2006 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
September 2006
For Further Information
A variety of technical notes for the LatticeECP2/M family are available on the Lattice web site at www.latticesemi.com.
For further information about interface standards refer to the following web sites:
• TN1124,
• TN1102,
• TN1103,
• TN1104,
• TN1105,
• TN1106,
• TN1107,
• TN1108,
• TN1109,
• TN1113,
• TN1162,
• JEDEC Standards (LVTTL, LVCMOS, SSTL, HSTL): www.jedec.org
• PCI: www.pcisig.com
LatticeECP2M SERDES/PCS Usage Guide
LatticeECP2/M sysIO Usage Guide
LatticeECP2/M sysCLOCK PLL Design and Usage Guide
LatticeECP2/M Memory Usage Guide
LatticeECP2/M High-Speed I/O Interface
Power Estimation and Management for LatticeECP2/M Devices
LatticeECP2/M sysDSP Usage Guide
LatticeECP2/M sysCONFIG Usage Guide
LatticeECP2/M Configuration Encryption Usage Guide
LatticeECP2/M Soft Error Detection (SED) Usage Guide
LatticeECP2/M Hardware Checklist
LatticeECP2/M Family Data Sheet
6-1
Supplemental Information
DS1006
Data Sheet DS1006
Further Info_01.0
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