BOXDP55SB Intel (CPU), BOXDP55SB Datasheet - Page 15

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BOXDP55SB

Manufacturer Part Number
BOXDP55SB
Description
Manufacturer
Intel (CPU)
Datasheet

Specifications of BOXDP55SB

Lead Free Status / RoHS Status
Supplier Unconfirmed
1.5
The board has four DIMM sockets and supports the following memory features:
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
1.35 V DDR3 SDRAM DIMMs (New JEDEC Specification)
Two independent memory channels with interleaved mode support
Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMs with x16 organization are not supported.
16 GB maximum total system memory (with 2 Gb memory technology). Refer to
Section 2.1.1 on page 39 for information on the total amount of addressable
memory.
Minimum total system memory: 1 GB using 512 MB x16 module
Non-ECC DIMMs
Serial Presence Detect
DDR3 1600 MHz, 1333 MHz, and DDR3 1066 MHz SDRAM DIMMs
XMP version 1.2 performance profile support for memory speeds above 1333 MHz
System Memory
Product Description
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