AXXDVDCDR MM# 880559 Intel (CPU), AXXDVDCDR MM# 880559 Datasheet

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AXXDVDCDR MM# 880559

Manufacturer Part Number
AXXDVDCDR MM# 880559
Description
Manufacturer
Intel (CPU)
Datasheet

Specifications of AXXDVDCDR MM# 880559

Lead Free Status / RoHS Status
Not Compliant
®
Intel
Server Board
SE7320VP2
Technical Product Specification
Intel order number C91056-002
Revision 2.1
October, 2006
Enterprise Platforms and Services Division – Marketing

AXXDVDCDR MM# 880559 Summary of contents

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Intel Server Board SE7320VP2 Technical Product Specification Enterprise Platforms and Services Division – Marketing Intel order number C91056-002 Revision 2.1 October, 2006 ...

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Revision History Date Revision Number May 2004 0.5 September 2004 0.9 October 2004 1.0 March 2005 1.9 April 2005 2.0 October 2006 2.1 ii Revision History Modifications Preliminary Release based off of the SE7520JR2 Technical Product Specification revision 0.5. Updated ...

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Intel® Server Board SE7320VP2 Information in this document is provided in connection with Intel implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for ...

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Table of Contents Table of Contents 1. Introduction ........................................................................................................................ 15 1.1 Chapter Outline...................................................................................................... 15 1.2 Server Board Use Disclaimer ................................................................................ 15 2. Server Board Overview ...................................................................................................... 16 2.1 Server Board SE7320VP2 SKU Availability........................................................... 16 2.2 Server Board SE7320VP2 Feature Set ...

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Intel® Server Board SE7320VP2 3.4.3 IDE Support ........................................................................................................... 46 3.4.4 SATA Support........................................................................................................ 46 3.4.5 Video Support ........................................................................................................ 47 3.4.6 Marvell* 88E8050 – PCI Express Network Interface Controller............................. 50 ® 3.4.7 Intel 82541PI – PCI Network Interface Controller ................................................ 50 3.4.8 ...

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Table of Contents 4.6.1 Operating Model .................................................................................................... 92 4.6.2 Administrator/User Passwords and F2 Setup Usage Model.................................. 92 4.6.3 Password Clear Jumper ........................................................................................ 94 4.7 Extensible Firmware Interface (EFI) ...................................................................... 94 4.7.1 EFI Shell ................................................................................................................ 94 4.8 Operating System Boot, Sleep, ...

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Intel® Server Board SE7320VP2 5.2.20 Messaging Interfaces........................................................................................... 116 5.2.21 Event Filtering and Alerting.................................................................................. 119 5.2.22 mBMC Sensor Support ........................................................................................ 120 5.3 Console Redirection ............................................................................................ 122 5.4 Wired For Management (WFM) ........................................................................... 122 5.5 Vital Product Data (VPD) ..................................................................................... 123 5.6 ...

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Table of Contents 6.5.8 Memory Error Codes ........................................................................................... 145 6.6 Light Guided Diagnostics..................................................................................... 146 7. Connectors and Jumper Blocks ..................................................................................... 147 7.1 Power Connectors ............................................................................................... 147 7.2 Riser Slots ........................................................................................................... 148 7.2.1 Low-profile PCI-X Riser Slot ................................................................................ 148 7.2.2 Full-height ...

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Intel® Server Board SE7320VP2 8.2.9 Common Mode Noise .......................................................................................... 173 8.2.10 Ripple / Noise ...................................................................................................... 174 8.2.11 Soft Starting ......................................................................................................... 174 8.2.12 Zero Load Stability Requirements ....................................................................... 174 8.2.13 Timing Requirements........................................................................................... 174 8.2.14 Residual Voltage Immunity in Standby Mode ...................................................... ...

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List of Figures List of Figures Figure 1. Server Board SE7320VP2 Board Layout..................................................................... 18 Figure 2. Server Board Dimensions............................................................................................ 20 Figure 3. Server Board SE7320VP2 Block Diagram................................................................... 21 Figure 4. CEK Processor Mounting ............................................................................................ 23 Figure 5. Identifying Banks of ...

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Intel® Server Board SE7320VP2 List of Tables Table 1. Baseboard Layout Reference ....................................................................................... 19 Table 2. Processor Support Matrix ............................................................................................. 24 Table 3. DIMM Module Capacities.............................................................................................. 32 Table 4. Supported DDR-266 DIMM Populations ....................................................................... 34 Table 5. Supported DDR-333 DIMM ...

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List of Tables Table 33. BIOS Setup, Memory Configuration Sub-menu Selections......................................... 79 Table 34. BIOS Setup, Boot Menu Selections ............................................................................ 80 Table 35. BIOS Setup, Boot Settings Configuration Sub-menu Selections ................................ 81 Table 36. BIOS Setup, Boot Device Priority Sub-menu ...

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Intel® Server Board SE7320VP2 Table 68. USB BIOS Error Messages....................................................................................... 134 Table 69. SMBIOS BIOS Error Messages ................................................................................ 134 Table 70. Error Codes and Messages ...................................................................................... 135 Table 71. BIOS Generated Beep Codes................................................................................... 137 Table 72. Troubleshooting BIOS Beep Codes.......................................................................... ...

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List of Tables Table 103. Board Design Specifications ................................................................................... 168 Table 104. P1 Main Power Connector ...................................................................................... 170 Table 105. P2 Processor Power Connector.............................................................................. 170 Table 106. P3 Baseboard Signal Connector............................................................................. 171 Table 107. P7 Hard Drive Power Connector............................................................................. 171 ...

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Intel® Server Board SE7320VP2 1. Introduction This Technical Product Specification (TPS) provides details about the architecture and feature ® set of the Intel Server Board SE7320VP2. The target audience is anyone wishing to obtain more in depth detail of the ...

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Server Board Overview 2. Server Board Overview ® The Intel Server Board SE7320VP2 is a monolithic printed circuit board with features that were designed to support the high-density 1U and 2U server markets. 2.1 Server Board SE7320VP2 SKU Availability In ...

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Intel® Server Board SE7320VP2 External I/O connectors - Stacked PS/2* ports for keyboard and mouse - RJ45 Serial B port - Two RJ45 NIC connectors - 15-pin video connector - Two USB 2.0 ports Internal I/O connectors / headers - ...

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Server Board Overview Figure 1. Server Board SE7320VP2 Board Layout Intel order number C91056-002 Intel® Server Board SE7320VP2 G ...

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Intel® Server Board SE7320VP2 Ref # Description 1 (J1A1) 2-pin Chassis Intrusion Header (J1A2) 2-pin Hard Drive Act LED Header (J1A4) Rolling BIOS Jumper 2 10-pin DH10 Serial A Header 3 USB Port 2 4 USB Port 1 5 Video ...

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Server Board Overview The following mechanical drawing shows the physical dimensions of the baseboard. 20 Figure 2. Server Board Dimensions Intel order number C91056-002 Intel® Server Board SE7320VP2 Revision 2.1 ...

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Intel® Server Board SE7320VP2 3. Functional Architecture This chapter provides a high-level description of the functionality associated with the architectural blocks that make up the Intel Server Board SE7320VP2. Figure 3. Server Board SE7320VP2 Block Diagram 3.1 Processor Sub-system The ...

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Functional Architecture 3.1.1 Processor VRD The baseboard has two VRDs (Voltage Regulator Down) providing the appropriate voltages to the installed processors. Each VRD is compliant with the VRD 10.1 specification and is ® designed to support Intel Xeon™ processors that ...

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Intel® Server Board SE7320VP2 3.1.5 Common Enabling Kit (CEK) Design Support The baseboard complies with Intel’s Common Enabling Kit (CEK) processor mounting and heat sink retention solution. The baseboard ships with a CEK spring snapped onto the bottom side of ...

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Functional Architecture Note: Only Intel Xeon processors that support a 800MHz Front Side Bus are supported on the Server Board SE7320VP2. See the table below for the supported processors. Processor Family ® Intel Xeon™ Intel Xeon Intel Xeon Intel Xeon ...

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Intel® Server Board SE7320VP2 3.1.6.6 Jumperless Processor Speed Settings ® TM The Intel Xeon processor does not utilize jumpers or switches to set the processor frequency. The BIOS reads the highest ratio register from all processors in the system. If ...

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Functional Architecture 3.1.7 Multiple Processor Initialization IA-32 processors have a microcode-based BSP-arbitration protocol. On reset, all of the processors compete to become the bootstrap processor (BSP serious error is detected during a Built-in Self-Test (BIST), that processor will ...

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Intel® Server Board SE7320VP2 ® 3.2 Intel E7320 chipset The architecture of the Server Board SE7320VP2 is designed around the Intel The chipset consists of two components that together are responsible for providing the interface between all major sub-systems on ...

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Functional Architecture 3.2.1.3 PCI Express* The Intel E7320 MCH is one of the first Intel chipsets to support the new PCI Express* high- speed serial I/O interface for superior I/O bandwidth. The scalable PCI Express interface complies with the PCI ...

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Intel® Server Board SE7320VP2 Each function within the 6300ESB ICH has its own set of configuration registers. Once configured, each appears to the system as a distinct hardware controller sharing the same PCI bus interface. 3.2.2.1 PCI Interface The 6300ESB ...

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Functional Architecture DMA is handled through the use of the LDRQ# lines from peripherals and special encoding on LAD[3:0] from the host. Single, Demand, Verify, and Increment modes are supported on the LPC interface. Channels 0–3 are 8 bit channels. ...

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Intel® Server Board SE7320VP2 3.2.2.9 General Purpose I/O (GPIO) General-purpose inputs and outputs are provided for custom system design. The number of inputs and outputs varies depending on the 6300ESB ICH configuration. All unused GPI pins must be pulled high ...

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Functional Architecture The Server Board SE7320VP2 provides the following maximum memory capacities based on the number of DIMM slots provided and maximum supported memory loads by the chipset: 24GB maximum capacity for DDR-266 16GB maximum capacity for DDR-333 and DDR2-400 ...

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Intel® Server Board SE7320VP2 MCH The BIOS reads the Serial Presence Detect (SPD) SEEPROMs on each installed memory module to determine the size and timing of the installed memory modules. The memory-sizing algorithm determines the size of each bank of ...

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Functional Architecture DDR-266 and DDR-333 DIMM population rules are as follows: DIMM banks must be populated in order, starting with the slots furthest from MCH. Single rank DIMMs must be populated before dual rank DIMMs. A maximum of four DIMMs ...

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Intel® Server Board SE7320VP2 Table 6. Supported DDR2-400 DIMM Populations Bank 3 – DIMMs 3A, 3B MCH Notes: On the Server Board SE7320VP2, when using all dual rank DDR-333 or DDR2-400 DIMMs, a total of four DIMMs can be populated. ...

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Functional Architecture The extended memory test is configured using the BIOS Setup Utility. The coverage of the test can be configured to one of the following: Test every location (Extensive) Test one interleave width per kilo-byte of memory (Sparse) Test ...

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Intel® Server Board SE7320VP2 mechanism, which provides x4 SDDC protection for DIMMS that utilize x4 devices. Bits from x4 parts are presented in an interleaved fashion such that each bit from a particular part is represented in a different ECC ...

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Functional Architecture initialization step, but also frees the processor to pursue other machine initialization and configuration tasks. Additional features have been added to the initialization engine to support high-speed population and verification of a programmable memory range with one of ...

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Intel® Server Board SE7320VP2 DRAM row boundary (DRB) registers, nor does it require notification to the operating system that anything has occurred in memory. 3.4 I/O Sub-System The I/O sub-system is made up of several components: The E7320 MCH provides ...

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Functional Architecture 3.4.1.1 P32-A: 32-bit, 33MHz PCI Subsystem All 32-bit, 33MHz PCI I/O is directed through the 6300ESB ICH. The 32-bit, 33MHz PCI segment created by the 6300ESB ICH is known as the P32-A segment. The P32-A segment supports the ...

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Intel® Server Board SE7320VP2 supported frequency of that card. When populating add-in cards in the PCI-X riser card, the add-in cards must be installed starting with the bottom PCI slot. A second add-in card must be installed in the middle ...

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Functional Architecture PCI Device MCH EXP Bridge C0 MCH EXP Bridge C1 MCH Extended Configuration ICH Hub Interface to PCI bridge ICH PCI to LPC bridge ICH IDE controller ICH Serial ATA ICH SMBus controller ICH USB controller #1 ICH ...

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Intel® Server Board SE7320VP2 3.4.2 Interrupt Routing The Server Board SE7320VP2 interrupt architecture accommodates both PC-compatible PIC mode and APIC mode interrupts through use of the integrated I/O APICs in the 6300ESB ICH. 3.4.2.1 Legacy Interrupt Routing For PC-compatible mode, ...

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Functional Architecture 3.4.2.3 Legacy Interrupt Sources The table below recommends the logical interrupt mapping of interrupt sources on the Server Board SE7320VP2. The actual interrupt map is defined using configuration registers in the 6300ESB ICH. ISA Interrupt IRQ0 8254 Counter ...

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Intel® Server Board SE7320VP2 3.4.2.4 Serialized IRQ Support The Server Board SE7320VP2 supports a serialized interrupt delivery mechanism. Serialized Interrupt Requests (SERIRQ) consists of a start frame, a minimum of 17 IRQ / data channels, and a stop frame. Any ...

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Functional Architecture 3.4.3 IDE Support The integrated IDE controller of the 6300ESB ICH provides two IDE channels. These IDE channels are capable of supporting up to two drives for each channel. A standard 40-pin IDE connector on the baseboard interfaces ...

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Intel® Server Board SE7320VP2 causes Device 31, Function 1 (IDE controller) to hidden, and its configuration registers are not used. The SATA Capability Pointer Register (offset 34h) will change to indicate that MSI is not supported in combined mode. The ...

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Functional Architecture Video is accessed using a standard 15-pin VGA connector found on the back edge of the server board. Video signals are also made available through the 100-pin control Panel / floppy / IDE connector allowing for an optional ...

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Intel® Server Board SE7320VP2 3.4.5.2 Video Memory Interface The memory controller subsystem of the Rage XL arbitrates requests from direct memory interface, the VGA graphics controller, the drawing coprocessor, the display controller, the video scalar, and hardware cursor. Requests are ...

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Functional Architecture 3.4.6 Marvell* 88E8050 – PCI Express Network Interface Controller The Marvell* 88E8050 Gigabit Ethernet controller is a single, compact component with integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) functions. This device uses PCI Express ...

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Intel® Server Board SE7320VP2 3.4.9.1 GPIOs The National Semiconductor* PC87427 Super I/O provides nine general-purpose input/output pins that the Server Board SE7320VP2 utilizes. The following table identifies the pin and the signal name used in the schematic: Pin 124 GPIO00/CLKRUN_L ...

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Functional Architecture Pin 49 GPIOE43/PWBTOUT_L 50 GPIOE44/LED1 51 GPIOE45/LED2 52 GPIOE46/SLPS3_L 53 GPIOE47/SLPS5_L 36 GPIO50/PWBTN_L 37 GPIO51/SIOSMI_L 38 GPIO52/SIOSCI_L 45 GPIO53/LFCKOUT/MSEN0 54 GPIO54/VDDFELL 56 GPIO55/CLKIN 32 GPO60/XSTB2/XCNF2_L 33 GPO61/XSTB1/XCNF1_L 34 GPO62/XSTB0/XCNF0_L 48 GPO63/ACBSA 55 GPO64/WDO_L/CKIN48 3.4.9.2 Serial Ports The baseboard ...

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Intel® Server Board SE7320VP2 3.4.9.2.2 Serial Port B Serial external 8-pin RJ45 connector that is located on the back edge of the baseboard. For those server applications that require an external modem, an RJ45-to-DB9 adapter is necessary. ...

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Functional Architecture Pins 1-3 Serial port is configured for DCD to DTR 2-4 Serial port is configured for DSR to DTR (default) For server applications that require a DB9 serial connector, an 8-pin RJ45-to-DB9 adapter must be used. The following ...

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Intel® Server Board SE7320VP2 3.4.9.5 Keyboard and Mouse Support Dual stacked PS/2 ports, located on the back edge of the baseboard, are provided for keyboard and mouse support. Either port can support a mouse or keyboard. Neither port supports hot ...

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Functional Architecture Upper Memory Ranges Lo PCI Memory Space Range Main Memory Address Range DOS Legacy Address Range Figure 8. Intel 56 64GB Hi PCI Memory Address Range Additional Main Memory Address Range 4GB Top of Low Memory (TOLM) TSEG ...

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Intel® Server Board SE7320VP2 3.5.1.1 DOS Compatibility Region The first region of memory below 1 MB was defined for early PCs, and must be maintained for compatibility. The region is divided into sub-regions as shown in the following figure. 0FFFFFh ...

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Functional Architecture 3.5.1.1.1 DOS Area The DOS region is 512 KB in the address range 0 to 07FFFFh. This region is fixed and all accesses go to main memory. 3.5.1.1.2 ISA Window Memory The ISA Window Memory is 128 KB ...

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Intel® Server Board SE7320VP2 Extended lntel E7320 chipset region PCI Memory Space Main Memory Address Region 3.5.1.2.1 Main Memory All installed memory greater than 1MB is mapped to local main memory 8GB of physical memory. Memory between 1MB ...

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Functional Architecture 3.5.1.2.2 PCI Memory Space Memory addresses below the 4GB range are mapped to the PCI bus. This region is divided into three sections: High BIOS, APIC configuration space, and general-purpose PCI memory. The General-purpose PCI memory area is ...

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Intel® Server Board SE7320VP2 3.5.1.4 System Management Mode Handling The chipset supports System Management Mode (SMM) operation in one of three modes. System Management RAM (SMRAM) provides code and data storage space for the SMI_L handler code, and is made ...

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Functional Architecture 3.5.2 I/O Map The baseboard I/O addresses to be mapped to the processor bus or through designated bridges in a multi-bridge system. Other PCI devices, including the 6300ESB ICH, have built-in features that support PC-compatible I/O devices and ...

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Intel® Server Board SE7320VP2 Address(es) 0076h NMI Mask (bit 7) and RTC address (bits 6::0) 0071h RTC Data 0073h RTC Data 0075h RTC Data 0077h RTC Data 0080h – 0081h BIOS Timer 0080h – 008F DMA Low Page Register 0090h ...

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Functional Architecture Address(es) 03F6h – 03F7h Primary IDE – Sec Floppy 03F8h – 03FFh Serial Port A (primary) 0400h – 043Fh DMA Controller 1, Extended Mode Registers 0461h Extended NMI / Reset Control 0480h – 048Fh DMA High Page Register ...

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Intel® Server Board SE7320VP2 3.5.3.1 CONFIG_ADDRESS Register CONFIG_ADDRESS is 32 bits wide and contains the field format shown in the following figure. Bits [23::16] choose a specific bus in the system. Bits [15::11] choose a specific device on the selected ...

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System BIOS 4. System BIOS The BIOS is implemented as firmware that resides in the Flash ROM. It provides hardware- specific initialization algorithms and standard PC-compatible basic input/output services, and ® standard Intel Server Board features. The Flash ROM also ...

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Intel® Server Board SE7320VP2 The BIOS ID for this server board has the form: SE7320VP20.86B.P01.01.00.0002.081320031156 4.2 BIOS Power-on Self Test (POST) 4.2.1 User Interface During the system boot POST process, there are two types of consoles used for displaying the ...

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System BIOS 4.2.1.3 Current Activity Window The bottom portion of the screen is reserved for the Current Activity Window graphics console, the window is 640x48 text console, the window is 80x2. The Current Activity Window is ...

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Intel® Server Board SE7320VP2 4.2.4 BIOS Boot Popup Menu The BIOS Boot Specification (BBS) provides for a Boot Menu Popup invoked by pressing the <Esc> key during POST. The BBS Popup menu displays all available boot devices. The list order ...

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System BIOS 4.3.4 Keyboard Commands While in the BIOS Setup utility, the Keyboard Command Bar supports the keys specified in the following table. Table 21. BIOS Setup Keyboard Command Bar Options Key Option Enter Execute Command The <Enter> key is ...

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Intel® Server Board SE7320VP2 Key Option F10 Save Changes and Pressing <F10> causes the following message to appear: Exit If “OK” is selected and the <Enter> key is pressed, all changes are saved and setup is exited. If “Cancel” is ...

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System BIOS Feature Options Language English French German Italian Spanish 4.3.5.2 Advanced Menu Table 23. BIOS Setup, Advanced Menu Options Feature Options Advanced Settings WARNING: Setting wrong values in below sections may cause system to malfunction. Processor Configuration N/A IDE ...

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Intel® Server Board SE7320VP2 Feature CPU 2 CPUID N/A Cache L1 N/A Cache L2 N/A Cache L3 N/A Max CPUID Value Limit Disabled Enabled Hyper-Threading Technology Disabled Enabled ® Intel SpeedStep Technology Auto Disabled 4.3.5.2.2 IDE Configuration Sub-menu Table 25. ...

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System BIOS Feature Options Mixed P-ATA / S-ATA N/A Primary IDE Master N/A Primary IDE Slave N/A Secondary IDE N/A Master Secondary IDE Slave N/A Third IDE Master N/A Fourth IDE Master N/A Hard Disk Write Disabled Protect Enabled IDE ...

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Intel® Server Board SE7320VP2 Table 26. Mixed P-ATA-S-ATA Configuration with only Primary P-ATA Feature Options Mixed P-ATA / S-ATA First ATA P-ATA M-S Channel S-ATA M-S Second ATA P-ATA M-S Channel S-ATA M-S rd 3rd & 4th ATA A1-3 M/A2-4 ...

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System BIOS Feature Options PIO Mode Auto DMA Mode Auto SWDMA0-0 SWDMA0-1 SWDMA0-2 MWDMA0-0 MWDMA0-1 MWDMA0-2 UWDMA0-0 UWDMA0-1 UWDMA0-2 UWDMA0-3 UWDMA0-4 UWDMA0-5 S.M.A.R.T. Auto Disabled Enabled 32Bit Data Transfer Disabled Enabled 4.3.5.2.3 Floppy Configuration Sub-menu ...

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Intel® Server Board SE7320VP2 4.3.5.2.4 Super I/O Configuration Sub-menu Table 29. BIOS Setup, Super I/O Configuration Sub-menu Feature Options Configure Nat42x Super I/O Chipset Serial Port A Address Disabled 3F8/IRQ4 2F8/IRQ3 3E8/IRQ4 2E8/IRQ3 Serial Port B Address Disabled 3F8/IRQ4 2F8/IRQ3 ...

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System BIOS 4.3.5.2.6 USB Mass Storage Device Configuration Sub-menu Table 31. BIOS Setup, USB Mass Storage Device Configuration Sub-menu Selections Feature Options USB Mass Storage Device Configuration USB Mass Storage 10 Sec Reset Delay 20 Sec 30 Sec 40 Sec ...

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Intel® Server Board SE7320VP2 Feature Options Onboard NIC 1 ROM Disabled Enabled Onboard NIC 2 (Right) Disabled Enabled Onboard NIC 2 ROM Disabled Enabled Slot 1 Option ROM Disabled Enabled Slot 2 Option ROM Disabled Enabled Slot 3 Option ROM ...

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System BIOS Feature DIMM 3A Installed Not Installed Disabled Mirror Spare DIMM 3B Installed Not Installed Disabled Mirror Spare Extended Memory Test Every Location Disabled Memory Retest Disabled Enabled Memory Remap Feature Disabled Enabled Memory Sparing ...

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Intel® Server Board SE7320VP2 4.3.5.3.1 Boot Settings Configuration Sub-menu Selections Table 35. BIOS Setup, Boot Settings Configuration Sub-menu Selections Feature Boot Settings Configuration Quick Boot Disabled Enabled Quiet Boot Disabled Enabled Bootup Num-Lock Off On PS/2 Mouse Support Disabled Enabled ...

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System BIOS 4.3.5.3.3 Hard Disk Drive Sub-menu Selections Table 37. BIOS Setup, Hard Disk Drive Sub-Menu Selections Feature Options Hard Disk Drives 1st Drive Varies Specifies the boot sequence from the available devices. nth Drive Varies Specifies the boot sequence ...

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Intel® Server Board SE7320VP2 Feature Options Set Admin N/A Password Set User Password N/A User Access Level No Access View Only Limited Full Access Clear User N/A Password Fixed disk boot Disabled sector protect Enabled Password On Boot Disabled Enabled ...

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System BIOS 4.3.5.5 Server Menu Table 41. BIOS Setup, Server Menu Selections Feature System Management N/A Serial Console Features N/A Event Log configuration N/A Assert NMI on SERR Disabled Enabled Assert NMI on PERR Disabled Enabled Resume on AC Power ...

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Intel® Server Board SE7320VP2 Feature OS Watchdog Timer Policy Stay On Reset Power Off Platform Event Filtering Disabled Enabled 4.3.5.5.1 System Management Sub-menu Selections Table 42. BIOS Setup, System Management Sub-menu Selections Feature Server Board Part Number Server Board Serial ...

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System BIOS 4.3.5.5.2 Serial Console Features Sub-menu Selections Table 43. BIOS Setup, Serial Console Features Sub-menu Selections Feature Options Serial Console Features BIOS Redirection Port Disabled Serial A Serial B Baud Rate 9600 19.2K 38.4K 57.6K 115.2K Flow Control No ...

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Intel® Server Board SE7320VP2 4.3.5.5.3 Event Log Configuration Sub-menu Selections Table 44. BIOS Setup, Event Log Configuration Sub-menu Selections Feature Options Event Log Configuration Clear All Event Logs Disabled Enabled BIOS Event Logging Disabled Enabled Critical Event Logging Disabled Enabled ...

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System BIOS 4.4 Flash Architecture and Flash Update Utility The flash ROM contains system initialization routines, the BIOS Setup Utility, and runtime support routines. The exact layout is subject to change, as determined by Intel. A 64-KB user block is ...

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... BIOS will be updated during the recovery process OEM wishes to preserve the OEM section across an update recommended that the OEM modify the provided AMIBOOT.ROM file with the user binary or OEM logo tools before performing the recovery. A BIOS recovery can be accomplished from one of the following devices: a standard 1. ...

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System BIOS Note: Three different hot-keys can be invoked: <Ctrl+Home>: Recovery with CMOS destroyed and NVRAM preserved <Ctrl+PageDown>: Recovery with both CMOS and NVRAM preserved <Ctrl+PageUp>: Recovery with both CMOS and NVRAM destroyed 4.4.5.2 Multi-disk Recovery The multi-disk recovery method ...

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Intel® Server Board SE7320VP2 4.5 OEM Binary System customers can supply code and data for use during POST and at run-time. Individual platforms may support a larger user binary. User binary code is executed at several defined ...

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System BIOS 4.6.1 Operating Model The following table summarizes the operation of security features supported by the BIOS. Some security features require the Intel ® not supported on the Intel Server Board SE7320VP2). These include “Diskette Write Protect”, “Video Blanking”, ...

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Intel® Server Board SE7320VP2 There are three possible password scenarios: Scenario #1 Administrator Password Is Not Installed User Password Is Not Installed Login Type: N/A Set Admin Password (visible) Set User Password (visible) User Access Level [Full]** (shaded) Clear User ...

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System BIOS Scenario #3 Administrator Password Is Installed User Password Is Not Installed Login Type: Supervisor Set Admin Password (visible) Set User Password (visible) User Access Level [Full] (visible) Clear User Password (hidden) Login Type: <Enter> Set Admin Password (hidden) ...

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Intel® Server Board SE7320VP2 4.8 Operating System Boot, Sleep, and Wake The IPMI 1.5 specification, section 22.10 and 22.11, has provisions for server management devices to set certain boot parameters by setting boot flags. Among the boot flags, parameter #5 ...

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System BIOS interrupt, or RTC alarm. The BIOS performs complete POST upon wake up from S4, and initializes the platform. The system can wake from the S1 state using a PS/2 keyboard, mouse, or USB device, in addition to the ...

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Intel® Server Board SE7320VP2 4.8.3 Off (Operating System Absent) The SCI interrupt is masked. The firmware polls the power button status bit in the ACPI hardware registers and sets the state of the machine in the chipset to ...

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System BIOS Additionally ACPI operating system is loaded, the following can cause the system to wake: the PME, RTC, or Wake-on-LAN*. Wake Event Power Button Ring indicate from Serial A Ring indicate from Serial B PME from PCI ...

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Intel® Server Board SE7320VP2 5. Platform Management The platform management sub-system on the Server Board SE7320VP2 consists of a micro- controller, communication buses, sensors, system BIOS, and server management firmware. The On-Board Platform Instrumentation is based around the National Semiconductor* ...

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Platform Management This chapter will provide an overview of the On-board Platform Instrumentation architecture and details of it features and functionality including BIOS interactions and support. 5.1 Platform Management Architecture Overview LM 93 ProcHot P1_VID[5:0] VID_CPU0[5:0] VID_CPU1[5:0] P2_VID[5:0] Therm Trip ...

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Intel® Server Board SE7320VP2 5.1.1 5V Standby The power supply must provide a 5V Standby power source for the platform to provide any management functionality. 5V Standby is a low power 5V supply that is active whenever the system is ...

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Platform Management access. The message-based interface isolates software from the particular hardware implementation. System Management Software discovers the platform’s sensor capabilities by reading the Sensor Data Records from a Sensor Data Record Repository managed by the management controller. Sensor Data ...

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Intel® Server Board SE7320VP2 The management controller provides ‘out-of-band’ remote management interfaces providing access to the platform health, event log, and recovery control features via LAN. This interface remains active on standby power, providing a mechanism where the SEL, SDR, ...

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Platform Management Updateable mBMC Firmware System Management Power Control (including providing Sleep/Wake and power push- button interfaces) Platform Event Filtering (PEF) Baseboard Fan Speed Control and Failure Monitoring Baseboard FRU Information interface Diagnostic Interrupt (Control Panel NMI) Handling Secure Mode ...

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Intel® Server Board SE7320VP2 5.2.1 Server Management I The table below describes the server management I that are connected to the indicated bus. The column labeled “I 2 physical I C bus connected to the mBMC. Only the Peripheral SMBus ...

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Platform Management 5.2.3 mBMC Hardware Architecture The following figure shows an example of the internal functional modules of the mBMC in a block diagram. The mBMC controls various server management functions, such as the system power/reset control, a variety of ...

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Intel® Server Board SE7320VP2 5.2.4 Power Supply Interface Signals The mBMC supports two power supply control signals: Power On and Power Good. The Power On signal connects to the chassis power subsystem through the chipset and is used to request ...

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Platform Management The mBMC uses the Power Good signal to monitor whether the power supply is on and operational, and to confirm whether the actual system power state matches the intended system on/off power state that was commanded with the ...

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Intel® Server Board SE7320VP2 5.2.6 Power-up Sequence When turning on the system power after one of the event occurrences, the mBMC executes the following procedure: 1. The mBMC asserts Power Supply (PS) Power On via the chipset and waits for ...

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Platform Management 5.2.8.3 Control Panel System Reset The reset button is a momentary contact button on the control panel. Its signal is routed through the control panel connector to the mBMC, which monitors and de-bounces it. The signal must be ...

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Intel® Server Board SE7320VP2 5.2.9.1 Control Panel Indicators The mBMC is capable of supporting three control panel indicators: Power LED, Fault/Status LED, and Chassis ID LED. The states of these indicators and how they relate to the mBMC/chassis state are ...

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Platform Management Degraded Condition One or more processors are disabled by Fault Resilient Boot (FRB) (not supported by the Server Board SE7320VP2) 5.2.9.1.3 Chassis ID LED The Chassis ID LED provides a visual indication of a system being serviced. The ...

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Intel® Server Board SE7320VP2 5.2.9.2.3 Reset Button An assertion of the control panel Reset signal to the mBMC causes the mBMC to start the reset and reboot process. This is immediate and without the cooperation of any software or operating ...

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Platform Management The LM93 controls the actual fan speeds based on temperature measurements according to a built-in table. The table itself is loaded as part of the SDR package according to which system configuration is used. In addition, BIOS passes ...

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Intel® Server Board SE7320VP2 During POST, the BIOS tells the mBMC the current real-time clock (RTC) time via the Set SEL Time command. The mBMC maintains this time, incrementing it once per second, until the mBMC is reset or until ...

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Platform Management The mBMC provides only low-level access to the FRU inventory area storage. It does not validate or interpret the data that is written. This includes the common header area. Applications cannot relocate or resize any FRU inventory areas. ...

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Intel® Server Board SE7320VP2 5.2.20.1 Channel Management The mBMC supports two channels: System interface 802.3 LAN Table 55. Suported Channel Assignments Channel ID Media Type 1 802.3 LAN 2 System Interface 5.2.20.2 User Model The mBMC supports one anonymous user ...

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Platform Management is unable to respond immediately to a host request. In this case, “Not Ready” is indicated in one of two ways: The host interface bandwidth is limited by the bus clock and mBMC latency. To meet the device ...

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Intel® Server Board SE7320VP2 5.2.21 Event Filtering and Alerting The mBMC implements most of the IPMI 1.5 alerting features. The following features are supported: PEF Alert over LAN 5.2.21.1 Platform Event Filtering (PEF) The mBMC monitors platform health and logs ...

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Platform Management Action Priority Power-Down 1 Soft-shutdown 2 Power cycle 3 Reset 4 Diagnostic Interrupt 5 PET Alert 6 Sensor feedback 7 IPMB message event 8 Fault LED action 9 Identification LED action 10 5.2.21.2 Alert over LAN LAN alerts ...

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Intel® Server Board SE7320VP2 Table 58. Platform Sensors for On-Board Platform Instrumentation Sensor Name Sensor # Physical Security Violation 01 Platform Security Violation 02 Power Unit Status 03 Button 04h Watchdog 05h System Boot 06h System PEF Event 07h Platform ...

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Platform Management Tach Fan 4 Tach Fan 5 Tach Fan 6 Tach Fan 7 Tach Fan 8 Tach Fan 9 Processor1 Fan Processor2 Fan Processor1 IERR Processor2 IERR Processor1 Thermal trip Processor2 Thermal trip Diagnostic Interrupt Button Chassis Identify Button ...

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Intel® Server Board SE7320VP2 5.4 Wired For Management (WFM) Wired for Management (WMF industry-wide initiative that increases the overall manageability and reduces the total cost of ownership. WFM allows a server to be managed over a network. The ...

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Error Reporting and Handling 6. Error Reporting and Handling This section defines how errors are handled. Also discussed is the role of the BIOS in error handling and the interaction between the BIOS, platform hardware, and server management firmware with ...

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Intel® Server Board SE7320VP2 6.1.3 FRB3 – BSP Reset Failures The BIOS and firmware provide a feature to guarantee that the system boots, even if one or more processors fail during POST. The mBMC contains one watchdog timer that can ...

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Error Reporting and Handling and BMC will also keep track of which timer expired (early FRB2, late FRB2 Watchdog) and display the appropriate error message to the user. All of the user options are intended to allow a ...

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Intel® Server Board SE7320VP2 6.2.2 Memory Error Handling in non-RAS Mode If the memory RAS feature is not enabled in BIOS Setup, the BIOS will apply the “10 SBE errors in one hour” implementation (memory error logging will be disabled ...

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Error Reporting and Handling disabled. Such an entry indicates a serious hardware problem that must be repaired at the earliest possible time. The system BIOS implements this feature for two types of errors, correctable memory errors and correctable bus errors. ...

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Intel® Server Board SE7320VP2 on the primary interface whenever there is a SERR# on the secondary side, if SERR# has been enabled through Setup. The same is true for PERR#. 6.3.1.2 Processor Bus Error If the chipset supports ECC on ...

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Error Reporting and Handling 6.4 Error Messages and Error Codes The BIOS indicates the current testing phase during POST by writing a hex code to I/O location 80h. If errors are encountered, error messages or codes will either be displayed ...

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Intel® Server Board SE7320VP2 Message Displayed Primary Master Hard Disk Error Primary Slave Hard Disk Error Secondary Master Hard Disk Error Secondary Slave Hard Disk Error 3rd Master Hard Disk Error 3rd Slave Hard Disk Error 4th Master Hard Disk ...

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Error Reporting and Handling Message Displayed 3rd Slave Drive - ATAPI Incompatible 4th Master Drive - ATAPI Incompatible 4th Slave Drive - ATAPI Incompatible 5th Master Drive - ATAPI Incompatible 5th Slave Drive - ATAPI Incompatible 6th Master Drive - ...

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Intel® Server Board SE7320VP2 Table 65. System Configuration BIOS Messages Message Displayed DMA-2 Error Error initializing secondary DMA controller. This is a fatal error, often indication a problem with system hardware. DMA Controller Error POST error while trying to initialize ...

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Error Reporting and Handling Message Displayed Keyboard Error Keyboard is not present or the hardware is not responding when the keyboard controller is initialized. PS2 Keyboard not found PS2 Keyboard support is enabled in the BIOS setup but the device ...

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Intel® Server Board SE7320VP2 The response section in the following table is divided into three types: Warning: The message is displayed on screen and the error is logged to the SEL. The system will continue booting with a degraded state. ...

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Error Reporting and Handling Error Code 004E Primary Slave Hard Disk Error 004F Secondary Master Hard Disk Error 0050 Secondary Slave Hard Disk Error 0055 Primary Master Drive - ATAPI Incompatible 0056 Primary Slave Drive - ATAPI Incompatible 0057 Secondary ...

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Intel® Server Board SE7320VP2 Error Code 8181 BIOS does not support current stepping for Processor 2 8190 Watchdog timer failed on last boot 8198 OS boot watchdog timer failure 8300 BaseBoard Management Controller failed Self Test 8301 Not enough space ...

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Error Reporting and Handling Table 72. Troubleshooting BIOS Beep Codes Number of Beeps Reseat the memory, or replace with known good modules. 4-7, 9-11 Fatal error indicating a serious problem with the system. Consult your system ...

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Intel® Server Board SE7320VP2 6.5 Checkpoints 6.5.1 System ROM BIOS POST Task Test Point (Port 80h Code) The BIOS sends a 1-byte hex code to port 80 before each task. The port 80 codes provide a troubleshooting method in the ...

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Error Reporting and Handling Diagnostic LEDs LSB Figure 17. Location of Diagnostic LEDs on Baseboard 6.5.3 POST Code Checkpoints Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint MSB 03 OFF OFF G 04 OFF G OFF 05 OFF G OFF 06 ...

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Intel® Server Board SE7320VP2 Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint MSB OFF OFF G 24 OFF OFF OFF OFF ...

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Error Reporting and Handling Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint MSB A1 R OFF OFF OFF OFF OFF A ...

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Intel® Server Board SE7320VP2 Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint MSB OFF OFF 6.5.5 Bootblock Recovery Code Checkpoint The Bootblock recovery ...

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Error Reporting and Handling Diagnostic LED Decoder G=Green, R=Red, A=Amber Checkpoint MSB 6.5.6 DIM Code Checkpoints The Device Initialization Manager ...

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Intel® Server Board SE7320VP2 6.5.7 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state. The following table describes the type of checkpoints that may occur during ACPI sleep or ...

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Error Reporting and Handling Tpoint 0F2h DQS_FAILURE (indicates DQS failure) 0F3h MEM_ERR_MEM_TEST_FAILURE (Error code for unsuccessful Memory Test) 0F4h MEM_ERR_ECC_INIT_FAILURE (Error code for unsuccessful ECC and Memory Initialization) 6.6 Light Guided Diagnostics The baseboard provides system fault/status LEDs in several ...

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Intel® Server Board SE7320VP2 7. Connectors and Jumper Blocks 7.1 Power Connectors The main power supply connection is obtained using a SSI Compliant 2x12 pin connector (J3K6). In addition, there are two additional power related connectors; one SSI compliant 2x4 ...

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Connectors and Jumper Blocks Table 83. Power Supply Signal Connector (J1G2) 7.2 Riser Slots The baseboard provides one riser slot providing both PCI-X and PCI Express signals to a riser card capable of supporting full-height add-in cards. The baseboard also ...

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Intel® Server Board SE7320VP2 Pin- PCI Spec Description Side Signal B the Server Board SE7320VP2)and INT_D# of the top slot (not supported on the Server Board SE7320VP2). 94 INTD# This pin will be used by 1U/2U riser to bring the ...

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Connectors and Jumper Blocks Pin- PCI Spec Description Side Signal B 60 +3.3V 59 DEVSEL# 58 PCI-XCAP 57 LOCK# 56 PERR# 55 +3.3V 54 SERR# 53 +3.3V 52 C/BE[1]# 51 AD[14] 50 GND 49 AD[12] 47 AD[10] 47 M66EN 46 ...

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Intel® Server Board SE7320VP2 Pin- PCI Spec Description Side Signal B 19 AD[51] 18 AD[49 (I/O) 3.3V or 1.5V 16 AD[47] 15 AD[45] 14 GND 13 AD[43] 12 AD[41] KEYWAY KEYWAY 11 GND 10 AD[39] 9 AD[37] 8 ...

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Connectors and Jumper Blocks Pin-Side PCI Spec Description B Signal 134 REFCLK2 + 133 REFCLK2 + 132 GND 131 GND 130 HSOp(0) 129 HSOn(0) 128 GND 127 GND 126 HSOp(1) 125 HSOn(1) 124 GND 123 GND 122 HSOp(2) 121 HSOn(2) ...

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Intel® Server Board SE7320VP2 Pin-Side PCI Spec Description B Signal 97 INTD# This pin will be used by 2U riser to bring the INT_B# interrupt from the top and INT_C# from the middle PCI slot down to the baseboard. 96 ...

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Connectors and Jumper Blocks Pin-Side PCI Spec Description B Signal 73 Ground 72 AD[27] 71 AD[25] 70 +3.3V 69 C/BE[3]# 68 AD[23] 67 Ground 66 AD[21] 65 AD[19] 64 +3.3V 63 AD[17] 62 C/BE[2]# 61 Ground 60 IRDY# 59 +3.3V ...

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Intel® Server Board SE7320VP2 Pin-Side PCI Spec Description B Signal 32 Reserved 31 Ground 30 C/BE[6]# 29 C/BE[4]# 28 Ground 27 AD[63] 26 AD[61] 25 3.3V 24 AD[59] 23 AD[57] 22 Ground 21 AD[55] 20 AD[53] 19 Ground 18 AD[51] ...

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Connectors and Jumper Blocks 7.3 Front Panel Connectors The Server Board SE7320VP2 provides three front panel connectors: a high-density 100-pin connector (J2J1) for use in the Intel backplane installed, a 50-pin front panel connector (J1J2) used in Intel’s chassis with ...

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Intel® Server Board SE7320VP2 Pin A32 IDE_SDD_5 A33 IDE_SDD_4 A34 IDE_SDD_3 A35 IDE_SDD_2 A36 IDE_SDD_1 A37 IDE_SDD_0 A38 GND A39 IDE_SDDACK_L A40 IDE_SDA_1 A41 IDE_SDA_0 A42 IDE_SDCS1_L A43 IDE_SEC_HD_ACT_L A44 GND A45 FAN_TACH5 A46 FAN_TACH6 A47 FAN_TACH7 A48 FAN_TACH8 A49 ...

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Connectors and Jumper Blocks 41 GND 43 GND 45 GND 47 GND 49 GND 7.3.2 SSI Compliant 34-pin Front Panel Connector Table 88. Front Panel SSI Standard 34-pin Connector (J1J1) Pin Signal Name 1 P5V 3 Key 5 FP_PWR_LED_L 7 ...

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Intel® Server Board SE7320VP2 7.4.2 NIC Connectors The Server Board SE7320VP2 provides two RJ45 NIC connectors oriented side by side on the back edge of the board (J8A1, J8A2). The pinout for each connector is identical and is defined in ...

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Connectors and Jumper Blocks 7.4.3 ATA-100 Connector The Server Board SE7320VP2 provides one legacy ATA-100 40-pin connector (J3K1). The pinout is defined in the following table. Its signals are not tied to the ATA functionality embedded into the high-density 100-pin ...

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Intel® Server Board SE7320VP2 7.4.4 SATA Connectors The Server Board SE7320VP2 provides two SATA (Serial ATA) connectors: SATA-0 (J1H1) and SATA-1 (J1H4), for use with an internal SATA backplane. The pin configuration for each connector is identical and is defined ...

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Connectors and Jumper Blocks 7.4.6 Serial Port Connectors The Server Board SE7320VP2 provides one external RJ45 Serial B port (J9A2) and one internal 9-pin Serial A header (J1A3). The following tables define the pinouts for each. Table 94. External RJ-45 ...

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Intel® Server Board SE7320VP2 7.4.7 Keyboard and Mouse Connector Two stacked PS/2 ports (J9A1) are provided to support both a keyboard and a mouse. Either PS/2 port can support a mouse or keyboard. The following table details the pinout of ...

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Connectors and Jumper Blocks One 1x10 connector on the baseboard (J1F1) provides an option to support an additional two USB ports. The pinout of the connector is detailed in the following table. Table 98. Internal USB Connector Pinout (J1F1) Pin ...

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Intel® Server Board SE7320VP2 In addition to the standard SSI fan headers to support the system fans, the baseboard includes a proprietary 24-pin fan connector (J3K5) to power and monitor system fans used in the Intel Server Chassis SR1400 and ...

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Connectors and Jumper Blocks 7.6 Configuration Jumpers 7.6.1 System Recovery and Update Jumpers The Server Board SE7320VP2 provides three 3-pin headers (J1H2, J1H3, J1H5), that are used to configure several system recovery and update options. Pin 1 on the jumper ...

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Intel® Server Board SE7320VP2 7.6.2 BIOS Select Jumper The jumper block J1A4, located just to the left of the Serial A port header, is used to select which BIOS image the system will boot using. Pin 1 on the jumper ...

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Design and Environmental Specifications 8. Design and Environmental Specifications 8.1 Server Board SE7320VP2 Design Specification Operation of the Server Board SE7320VP2 at conditions beyond those shown in the following table may cause permanent damage to the system. Exposure to absolute ...

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Intel® Server Board SE7320VP2 8.2.1 Output Connectors Listed or recognized component appliance wiring material (AVLV2), CN, rated min 105 300Vdc shall be used for all output wiring. Note: The following diagram shows the power harness spec drawing as defined for ...

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Design and Environmental Specifications P1 Main Power Connector Connector housing: 24-pin Molex* Mini-Fit Jr. 39-01-2245 or equivalent Contact: Molex Mini-Fit, HCS, female, crimp 44476 or equivalent Pin SIgnal 1 +3.3 VDC 2 +3.3 VDC 3 COM 4 +5 VDC* 5 ...

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Intel® Server Board SE7320VP2 P3 Power Signal Connector Connector housing: 5-pin Molex 50-57-9705 or equivalent Contacts: Molex 16-02-0087 or equivalent Table 106. P3 Baseboard Signal Connector P7 Hard Drive Back Plane Power Connector Connector housing: 6-pin Molex Mini-Fit Jr. PN# ...

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Design and Environmental Specifications 8.2.3 Remote Sense The power supply has remote sense return (ReturnS) to regulate out ground drops for all output voltages; +3.3V, +5V, +12V1, +12V2, +12V3, -12V, and 5VSB. The power supply uses remote sense (3.3VS) to ...

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Intel® Server Board SE7320VP2 8.2.6 Dynamic Loading The output voltages shall remain within limits specified for the step loading and capacitive loading specified in the table below. The load transient repetition rate shall be tested between 50Hz and 5kHz at ...

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Design and Environmental Specifications 8.2.10 Ripple / Noise The maximum allowed ripple/noise output of the power supply is defined in the following table. This is measured over a bandwidth of 0Hz to 20MHz at the power supply output connectors. +3.3V ...

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Intel® Server Board SE7320VP2 Vout 10% Vout Item T Delay from AC being applied to 5VSB being within regulation. sb_on_delay T Delay from AC being applied to all output voltages being ac_on_delay within regulation. T Time ...

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Design and Environmental Specifications AC Input Vout T AC_on_delay T sb_on_delay PWOK 5VSB T sb_vout PSON AC turn on/off cycle Figure 22. Turn On/Off Timing (Power Supply Signals) 8.2.14 Residual Voltage Immunity in Standby Mode The power supply should be ...

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Intel® Server Board SE7320VP2 8.3 Product Regulatory Compliance 8.3.1 Product Safety Compliance The Server Board SE7320VP2 complies with the following safety requirements: UL 1950 - CSA 950 (US/Canada 950 (European Union) IEC60 950 (International) CE – Low Voltage ...

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Design and Environmental Specifications 8.3.3 Product Regulatory Compliance Markings This product is marked with the following Product Certification Markings: UL Recognition Mark CE Mark Russian GOST Mark Australian C-Tick Mark BSMI DOC Marking BSMI EMC Warning RRL MIC Mark 8.4 ...

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Intel® Server Board SE7320VP2 This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful ...

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Design and Environmental Specifications 8.4.5 Korean RRL Compliance This product has been tested and complies with MIC Notices No. 1997-41 and 1997-42. The product has been marked with the MIC logo to illustrate compliance. The English translation for the above ...

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Intel® Server Board SE7320VP2 Appendix A: Integration and Usage Tips The Server Board SE7320VP2, as integrated into the Server Chassis SR1400 LC to form the Server Platform SR1435VP2 or in the Server Chassis SR2400, will support FCC Class A with ...

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Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (e.g., “82460GX”) with alpha entries following (e.g., “AGP 4x”). Acronyms are then entered in their respective place, with non-acronyms following. ...

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Intel® Server Board SE7320VP2 Term INTR Interrupt IP Internet Protocol IPMB Intelligent Platform Management Bus IPMI Intelligent Platform Management Interface IR Infrared ITP In-Target Probe KB 1024 bytes KCS Keyboard Controller Style LAN Local Area Network LCD Liquid Crystal Display ...

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Glossary Term SIO Server Input/Output SMI Server Management Interrupt (SMI is the highest priority nonmaskable interrupt) SMM Server Management Mode SMS Server Management Software SNMP Simple Network Management Protocol TBD To Be Determined TIM Thermal Interface Material UART Universal Asynchronous ...

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Intel® Server Board SE7320VP2 See the following documents for additional information: ® Intel Server Board SE7320VP2 BIOS External Product Specification. Intel Corporation Mini Baseboard Management Controller mBMC Core External Product Specification. Intel Corporation ® Intel Server Chassis SR1400 LC and ...