92HD81B1C5NLGXUAX Integrated Device Technology (Idt), 92HD81B1C5NLGXUAX Datasheet - Page 70
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92HD81B1C5NLGXUAX
Manufacturer Part Number
92HD81B1C5NLGXUAX
Description
Audio Codec 2ADC / 2DAC 24-Bit 48-Pin VFQFPN EP Tray
Manufacturer
Integrated Device Technology (Idt)
Type
General Purposer
Datasheet
1.92HD81B1C5NLGXUAX.pdf
(289 pages)
Specifications of 92HD81B1C5NLGXUAX
Package
48VFQFPN EP
Adc/dac Resolution
24 Bit
Number Of Channels
2ADC /2 DAC
Sampling Rate
192 KSPS
Number Of Dac Outputs
8
Number Of Dacs
2
Operating Supply Voltage
1.5|1.8|3.3|4|4.75|5 V
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SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Rsvd
W2
W1
W0
Field Name
Rsvd
EnMask2
Reg
Get
Set
7.4.15. AFG (NID = 01h): GPIOUnsol
Byte 4 (Bits 31:24)
Bits
31:3
Reserved.
2
Wake enable for GPIO2: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
1
Wake enable for GPIO1: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
0
Wake enable for GPIO0: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
Bits
31:3
Reserved.
2
Unsolicited enable mask for GPIO2. If set, and the Unsolicited Response con-
trol for this widget has been enabled, an unsolicited response will be sent when
GPIO2 is configured as input and changes state.
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
R/W
R
RW
F1900h
Default
00000000h
0h
0h
0h
Default
00000000h
0h
70
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR - DAFG - ULR
92HD81
Byte 1 (Bits 7:0)
719h
PC AUDIO
V 0.987 11/09
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