MAX2839ETN+T Maxim Integrated Products, MAX2839ETN+T Datasheet - Page 18

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MAX2839ETN+T

Manufacturer Part Number
MAX2839ETN+T
Description
RF Transceiver 2.3Ghz To 2.7Ghz MIM O Wireless Broadband
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX2839ETN+T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.3GHz to 2.7GHz MIMO Wireless Broadband
RF Transceiver
18
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
1
2
3
4
5
6
7
8
9
______________________________________________________________________________________
GNDRXLNA_A Receiver A LNA Ground
GNDRXLNA_B Receiver B LNA Ground
VCCRXLNA_A Receiver A LNA Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
VCCRXLNA_B Receiver B LNA Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
VCCTXPAD
RXBBQB+
VCCTXMX
VCCXTAL
GNDVCO
RXBBQB-
VCCVCO
RXBBIB+
CPOUT+
CLKOUT
VCOBYP
RXBBIB-
TXOUT+
ENABLE
REFCLK
CPOUT-
RXINB+
TXOUT-
PABIAS
GNDCP
VCCCP
RXINB-
NAME
XTAL1
LOAD
DOUT
SCLK
DIN
CS
B0
B4
B3
B2
B1
B5
Receiver Gain-Control Logic Input Bit 0
Receiver Gain Select. Positive edge trigger latches digital gain inputs B0–B7 to receive A. Negative
edge trigger latches digital gain inputs B0–B7 to receive B.
Receiver B LNA Differential Input. Input is internally DC-coupled.
Receiver and Transmitter Gain-Control Logic Input Bit 4
Receiver and Transmitter Gain-Control Logic Input Bit 3
Supply Voltage for Transmitter PA Driver. Bypass with a 22pF capacitor as close as possible to the pin.
Receiver and Transmitter Gain-Control Logic Input Bit 2
Power Amplifier Driver Differential Output. The pins have internal AC blocking capacitors.
Receiver and Transmitter Gain-Control Logic Input Bit 1
Receiver and Transmitter Gain-Control Logic Input Bit 5
Transmit External PA Bias DAC Output
Transmitter Upconverter Supply Voltage. Bypass with a 22pF capacitor as close as possible to the pin.
Serial-Clock Logic Input of 4-Wire Serial Interface
Transceiver Enable
Reference Clock Buffer Output
Crystal or Reference Clock Input. AC-couple a crystal or a reference clock to this analog input.
XTAL Input. Connect the other terminal of the XTAL to this pin.
Crystal Oscillator Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
PLL Charge-Pump Supply Voltage. Bypass with a 100nF capacitor as close as possible to the pin.
Charge-Pump Circuit Ground
Differential Charge-Pump Output. Connect the frequency synthesizer’s loop filter between these pins
(see the Typical Operating Circuit).
VCO Ground
On-Chip VCO Regulator Output Bypass. Bypass with a 1µF capacitor to GND. Do not connect other
circuitry to this pin.
VCO Supply Voltage. Bypass with a 22nF capacitor as close as possible to the pin.
Chip-Select Logic Input of 4-Wire Serial Interface
Data Logic Output of 4-Wire Serial Interface
Data Logic Input of 4-Wire Serial Interface
Receiver B Baseband I-Channel Differential Outputs
Receiver B Baseband Q-Channel Differential Outputs
FUNCTION
Pin Description

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