MAX2667EWT+T Maxim Integrated Products, MAX2667EWT+T Datasheet - Page 5

• Manufacturer Part Number: MAX2667EWT+T
• Description: RF Amplifier Ultra Low Noise Figu re GPS/GNSS Amplifie
• Manufacturer: Maxim Integrated Products

Specifications of MAX2667EWT+T

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX2667/MAX2669 are LNAs designed for GPS
L1, Galileo, and GLONASS applications. The devices
feature a power-shutdown control mode to eliminate the
need for an external supply switch. The devices achieve
a high gain and an ultra-low noise figure.
The devices require an off-chip input matching. Only
an inductor in series with a DC-blocking capacitor is
BUMP
C1
C2
A1
A2
B1
B2
RFOUT/SHDN
GPS/GNSS Ultra-Low-Noise-Figure LNAs
GNDAC
GNDDC
NAME
BIAS
RFIN
Input and Output Matching
V
Detailed Description
CC
Provides Bias for LNA Input. Connect to B1 (RFIN) through a high-value inductor (100nH),
and bypass to ground close to the pin.
RF Output and SHDN Logic Input. RFOUT is internally matched to 50I and has an internal
DC-blocking capacitor. The SHDN logic input is coupled through a 25kI resistor.
RF Input. Connect to A1 through bias choke, and connect matching network and DC-
blocking capacitor.
Supply Voltage. Bypass to ground with a capacitor close to the IC.
Ground of the RF Path. Connect to the 2nd-layer PCB ground plane with a via next to the pin
pad.
Ground of Bias Circuit. Connect to the 2nd-layer PCB ground plane with a separate via from
pin C1. Sharing a ground via with pin C1 might cause stability problems.
BUMP SIDE DOWN
TOP VIEW
A
B
C
+
GNDAC
MAX2667/MAX2669
BIAS
RFIN
1
needed to form the input matching circuit. The Typical
Application Circuit shows the recommended input-
matching network. These values are optimized for the
best simultaneous gain, noise figure, and return loss
performance. Tables 1 and 2 list typical device S param-
eters and K
output matching to 50Ω at the output, eliminating the
need for external matching components. The value of the
input coupling capacitor affects IIP3. A smaller coupling
capacitor results in lower IIP3.
WLP
RFOUT/
GNDDC
SHDN
FUNCTION
V
2
CC
f
values. The devices integrate an on-chip
Bump Configuration
Bump Description
5