MAX2112ETI+T Maxim Integrated Products, MAX2112ETI+T Datasheet - Page 16

• Manufacturer Part Number: MAX2112ETI+T
• Description: RF Receiver Direct Conversion Tu ner for DVB-S2 -40 t
• Manufacturer: Maxim Integrated Products

Specifications of MAX2112ETI+T

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Alternatively, the MAX2112 can be set to autonomously
choose a VCO by setting the VAS bit in the VCO regis-
ter to logic-high. The VAS routine is initiated once the
F-Divider LSB register word (REG 5) is loaded.
In the event that only the N-divider register or
F-divider MSB word is changed, the F-divider LSB
word must also be loaded last to initiate the VCO
autoselect function. The VCO value programmed in the
VCO[4:0] register serves as the starting point for the auto-
matic VCO selection process.
During the selection process, the VASE bit in the Status
Byte-1 register is cleared to indicate the autoselection
function is active. Upon successful completion, bits VASE
and VASA are set and the VCO selected is reported in the
Status Byte-2 register (see Table 15). If the search is
unsuccessful, VASA is cleared and VASE is set. This indi-
cates that searching has ended but no good VCO has
been found, and occurs when trying to tune to a frequen-
cy outside the VCO’s specified frequency range.
Refer to the MAX2112/MAX2120 VCO Autoselect (VAS)
Application Note for more information.
The MAX2112 has an internal 3-bit ADC connected to
the VCO tune pin (VTUNE). This ADC can be used for
checking the lock status of the VCOs.
Table 17 summarizes the ADC output bits and the VCO
lock indication. The VCO autoselect routine only selects
Complete, Direct-Conversion
Tuner for DVB-S2 Applications
Table 17. ADC Trip Points and Lock Status
16
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ADC[2:0]
000
001
010
101
110
111
LOCK STATUS
VAS locked
VAS locked
Out of lock
Out of lock
Locked
Locked
3-Bit ADC
a VCO in the “VAS locked” range. This allows room for
a VCO to drift over temperature and remain in a valid
“locked” range.
The ADC must first be enabled by setting the ADE bit in
the VCO register. The ADC reading is latched by a sub-
sequent programming of the ADC latch bit (ADL = 1).
The ADC value is reported in the Status Byte-2 register
(see Table 15).
The MAX2112 features normal operating mode and
standby mode using the I
high to the STBY bit in the Control register puts the
device into standby mode, during which only the 2-
wire-compatible bus, the crystal oscillator, the XTAL
buffer, and the XTAL buffer divider are active.
In all cases, register settings loaded prior to entering
shutdown are saved upon transition back to active
mode. Default register values are provided for the
user’s convenience only. It is the user’s responsibility to
load all the registers no sooner than 100µs after the
device is powered up.
The MAX2112 EV kit serves as a guide for PCB layout.
Keep RF signal lines as short as possible to minimize
losses and radiation. Use controlled impedance on all
high-frequency traces. For proper operation, the
exposed paddle must be soldered evenly to the board’s
ground plane. Use abundant vias beneath the exposed
paddle for maximum heat dissipation. Use abundant
ground vias between RF traces to minimize undesired
coupling. Bypass each V
capacitor placed as close as possible to the pin.
CC
2
Layout Considerations
C interface. Setting a logic-
pin to ground with a 1nF
Standby Mode