MAX7034AUI+ Maxim Integrated Products, MAX7034AUI+ Datasheet - Page 7

• Manufacturer Part Number: MAX7034AUI+
• Description: RF Receiver IC RX 315MHZ/433MHZ ASK
• Manufacturer: Maxim Integrated Products

Specifications of MAX7034AUI+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5, 10
PIN
2, 7
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
3
4
6
8
9
DATAOUT
XTALSEL
LNAOUT
LNASRC
EN_REG
MIXOUT
PDOUT
MIXIN1
MIXIN2
NAME
XTAL1
LNAIN
AGND
DGND
XTAL2
IRSEL
SHDN
DV
AV
DFFB
IFIN1
IFIN2
V
DFO
DSN
OPP
DSP
_______________________________________________________________________________________
DD5
DD
DD
315MHz/434MHz ASK Superheterodyne
Crystal Input 1
P osi ti ve Anal og S up p l y V ol tag e. AV
AV
cl ose as p ossi b l e to the p i n ( see the Typ i cal Ap p l i cati on C i r cui t) . Byp ass p i n 7 w i th a 0.01µF cap aci tor .
Low-Noise Amplifier Input. See the Low-Noise Amplifier section.
Low-Noise Amplifier Source for external Inductive Degeneration. Connect inductor to ground to set
LNA input impedance. See the Low-Noise Amplifier section.
Analog Ground
Low-Noise Amplifier Output. Connect to mixer input through an LC tank filter. See the Low-Noise
Amplifier section.
1st Differential Mixer Input. Connect to LC tank filter from LNAOUT through a 100pF capacitor. See
the Typical Application Circuit.
2nd Differential Mixer Input. Connect to AV
See the Typical Application Circuit.
Image-Rejection Select. Set V
unconnected to center image rejection at 375MHz. Set V
434MHz. See the Mixer section.
330Ω Mixer Output. Connect to the input of the 10.7MHz bandpass filter.
Digital Ground
Positive Digital Supply Voltage. Connect to AV
as possible to the pin.
Regulator Enable. Connect to V
operation between +3.0V and +3.6V. See the Voltage Regulator section.
Crystal Divider Ratio Select. Drive XTALSEL low to select divider ratio of 64, or drive XTALSEL high to
select divider ratio of 32.
1st Differential Intermediate-Frequency Limiter Amplifier Input. Connect to the output of a 10.7MHz
bandpass filter.
2nd Differential Intermediate-Frequency Limiter Amplifier Input. Bypass to AGND with a 1500pF
capacitor as close as possible to the pin.
Data Filter Output
Negative Data Slicer Input
Noninverting Op-Amp Input for the Sallen-Key Data Filter
Data Filter Feedback Node. Input for the feedback of the Sallen-Key data filter.
Positive Data Slicer Input
+5.0V Supply Voltage
Digital Baseband Data Output
Peak-Detector Output
Power-Down Select Input. Drive high to power up the IC. Internally pulled down to AGND with a
100kΩ resistor.
C r ystal Inp ut 2. C an al so b e d r i ven w i th an exter nal r efer ence osci l l ator . S ee the C r ystal O sci l l ator secti on.
DD
p i ns m ust b e exter nal l y connected to each other . Byp ass p i n 2 to AG N D w i th a 0.1µF cap aci tor as
IRSEL
DD5
DD
= 0V to center image rejection at 315MHz. Leave IRSEL
to enable internal regulator. Pull this pin low to allow device
i s connected to an on- chi p + 3.4V l ow - d r op out r eg ul ator . Both
DD
FUNCTION
side of the LC tank filter through a 100pF capacitor.
DD
. Bypass to DGND with a 0.01µF capacitor as close
IRSEL
= DV
DD
to center image rejection at
Pin Description
Receiver
7