4307-52 Peregrine Semiconductor, 4307-52 Datasheet - Page 2
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4307-52
Manufacturer Part Number
4307-52
Description
IC DSA 5BIT 50 OHM 20-QFN
Manufacturer
Peregrine Semiconductor
Series
UltraCMOS™r
Datasheet
1.4307-52.pdf
(11 pages)
Specifications of 4307-52
Attenuation Value
15.5dB
Tolerance
±0.15dB
Frequency Range
0 ~ 2GHz
Impedance
75 Ohm
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1046-1034-2
Figure 15. Pin Configuration (Top View)
Table 2. Pin Descriptions
Notes: 1: Both RF ports must be held at 0 V
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 11
Paddle
Clock
No.
Pin
Data
10
11
12
13
14
15
16
17
18
19
20
RF1
N/C
1
2
3
4
5
6
7
8
9
LE
2: Latch Enable (LE) has an internal 100 kΩ resistor to V
3: Connect pin 12 to GND to enable internal negative voltage
4. Place a 10 kΩ resistor in series, as close to pin as possible
external series capacitor.
generator. Connect pin 12 to V
disable internal negative voltage generator.
to avoid frequency resonance. See “Resistor on 3”
1
2
4
3
5
V
Name
Clock
PUP2
ss
GND
GND
GND
GND
Data
C0.5
Pin
N/C
RF1
N/C
RF2
P/S
V
V
LE
/GND
C8
C4
C2
C1
DD
DD
Exposed Solder Pad
paragraph
20-lead
4x4mm
QFN
Power-up selection bit.
No connect
RF port (Note 1).
Serial interface data input (Note 4).
Serial interface clock input.
Latch Enable input (Note 2).
Power supply pin.
No connect
Power supply pin.
Ground connection.
Ground connection.
Negative supply voltage or GND
connection(Note 3)
Parallel/Serial mode select.
RF port (Note 1).
Attenuation control bit, 8 dB.
Attenuation control bit, 4 dB.
Attenuation control bit, 2 dB.
Ground connection.
Attenuation control bit, 1 dB.
Attenuation control bit, 0.5 dB.
Ground for proper operation
Description
15
14
13
12
11
SS
DC
(-VDD) to bypass and
C8
RF2
P/S
Vss/GND
GND
or DC blocked with an
DD.
Table 3. Absolute Maximum Ratings
Table 4. Operating Ranges
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the
package must be grounded for proper device
operation.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rate specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Switching Frequency
The PE4307 has a maximum 25 kHz switching rate.
Resistor on Pin 3
A 10 kΩ resistor on the input to Pin 3 (see Figure 5)
will eliminate package resonance between the RF
input pin and the digital input. Specified attenuation
error versus frequency performance is dependent
upon this condition.
V
Voltage
I
Current
Digital Input High
Digital Input Low
Digital Input Leakage
Input Power
Temperature range
DD
Symbol
DD
Power Supply
V
V
Power Supply
T
P
V
ESD
DD
ST
IN
Parameter
I
Document No. 70-0161-04 │ UltraCMOS™ RFIC Solutions
Power supply voltage
Voltage on any input
Storage temperature range
Input power (50Ω)
ESD voltage (Human Body
Model)
Parameter/Conditions
0.7xV
Min
-40
2.7
DD
Typ
3.0
Min
-0.3
-0.3
-65
Product Specification
0.3xV
Max
100
+24
3.3
85
1
Max
V
150
+30
500
4.0
0.3
DD
DD
+
PE4307
Units
dBm
Units
dBm
µA
µA
°C
V
V
V
°C
V
V
V