2008BVLF Integrated Device Technology (Idt), 2008BVLF Datasheet - Page 3

• Manufacturer Part Number: 2008BVLF
• Description: Time Code Receiver/Generator 44-Pin PLCC Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 2008BVLF

• Package: 44PLCC
• Power Supply Type: Analog|Digital
• Typical Supply Current: 50(Max)|5(Max) mA
• Typical Operating Supply Voltage: 5 V
• Minimum Operating Supply Voltage: 4.5 V
• Maximum Operating Supply Voltage: 5.5 V

Pin Descriptions
TYPE:
A – Analog • P – Power • I – Input • O – Output
PIN NUMBER
TQFP
12, 10
24, 23
38–31
11, 9
42
44
20
22
30
26
40
29
15
13
14
41
43
21
18
16
17
19
27
25
39
28
4
2
8
7
3
5
6
1
PLCC
30, 29
44–37
18, 16
17, 15
20
26
28
27
24
22
25
36
32
34
21
19
14
13
23
10
33
31
12
35
11
4
6
7
9
2
3
5
8
1
VITCGATE
Y1, Y2
C1, C2
DTHRESH
STHRESH
CTHRESH
Y OUT
C OUT
FRAME
CLICK
LTCIN+
LTCIN–
LTCOUT
LRCLK
VITCOUT
TxD
RxD
CTS*
RTS*
XTAL1
XTAL2
LFC
A1-A0
IOR*
IOW*
SMPTECS*
UARTCS*
RESET
D7-D0
INTR
AVDD
AVSS
VDD
VSS
NAME
PIN
TYPE
AO
AO
AO
I/O
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
O
O
O
O
O
O
O
P
P
P
P
I
I
I
I
I
I
I
I
I
14.318 MHz crystal input.
14.318 MHz crystal oscillator output.
(Luma) input for S-VHS and HI-8 systems.
C (Chroma) inputs for S-VHS and HI-8 systems. In NTSC systems, this
Data Threshold bypass input.
SYNC Threshold bypass input.
Clamp Threshold bypass input.
Video output. This is also the Y (Luma) output in S-Video mode.
C (Chroma) output for S-VHS and HI-8 systems.
Color Frame A/B input. This input is self biased (See Applications).
SMPTE LTC input+. This input is self biased (See Applications).
SMPTE LTC input–. This input is self biased (See Applications).
SMPTE LTC output
SMPTE LTC receive clock output.
SMPTE VITC output to video mixer circuit.
VITC gate indicates VITC code is being output for video overlay.
Clear to Send
SMPTE port chip select (active low)
Bi-directional data bus
Digital V
Video inputs from camera or other source. NOTE: This is also the Y
pin should be tied to its respective Y input.
LTC SYNC input. This input is self biased (See Applications).
UART Transmit data
UART Receive data
Ready to Send
Tie to +5 VDC
Address bus
Read Enable (active low)
Write Enable (active low)
UART chip select (active low)
Master reset (active high)
Interrupt Request (active high)
Analog V
Analog Ground
Digital
2008 2008B ICS2008
DD
DD
3
DESC RIPTI ON
ICS2008B
ICS2008B