LFE2-12E-5F256C LATTICE SEMICONDUCTOR, LFE2-12E-5F256C Datasheet - Page 308
LFE2-12E-5F256C
Manufacturer Part Number
LFE2-12E-5F256C
Description
FPGA LatticeECP2 Family 12000 Cells 90nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-12E-5F256C
Package
256FBGA
Family Name
LatticeECP2
Device Logic Units
12000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
193
Ram Bits
226304
In System Programmability
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-12E-5F256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LFE2M50E/SE and LFE2M70E/SE Logic Signal Connections: 900 fpBGA
Lattice Semiconductor
Number
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
*** These sysCONFIG pins are dedicated I/O pins for configuration. The outpus are actively driven during normal device operation.
****Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one con-
nection with a package ball or pin.
Ball
V18
Function
Ball/Pad
VCCPLL
LFE2M50E/SE
Bank
-
Dual Function
Differential
4-205
Function
Ball/Pad
VCCPLL
LatticeECP2/M Family Data Sheet
Bank
-
LFE2M70E/SE
Dual Function
Pinout Information
Differential
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