XC6SLX150T-3FGG676I Xilinx Inc, XC6SLX150T-3FGG676I Datasheet - Page 70
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XC6SLX150T-3FGG676I
Manufacturer Part Number
XC6SLX150T-3FGG676I
Description
FPGA Spartan®-6 Family 147443 Cells 45nm (CMOS) Technology 1.2V 676-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan® 6 LXTr
Datasheet
1.XC6SLX45-2FGG484CES.pdf
(76 pages)
Specifications of XC6SLX150T-3FGG676I
Package
676FBGA
Family Name
Spartan®-6
Device Logic Cells
147443
Device Logic Units
92152
Number Of Registers
184304
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
396
Ram Bits
4939776
Package / Case
676-BGA
Mounting Type
Surface Mount
Voltage - Supply
1 V ~ 3.6 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
396
Number Of Logic Elements/cells
147443
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC6SLX150T-3FGG676I
Manufacturer:
INTEL
Quantity:
1
Company:
Part Number:
XC6SLX150T-3FGG676I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Company:
Part Number:
XC6SLX150T-3FGG676I
Manufacturer:
XILINX
Quantity:
200
Table 75: Duty Cycle Distortion and Clock-Tree Skew (Cont’d)
DS162 (v2.0) March 31, 2011
Preliminary Product Specification
Notes:
1.
2.
3.
T
BUFIOSKEW
Symbol
LXT devices are not available with a -1L speed grade. The LX4 is not available in -3N speed grade.
These parameters represent the worst-case duty cycle distortion observable at the pins of the device using LVDS output buffers. For cases where
other I/O standards are used, IBIS can be used to calculate any additional duty cycle distortion that might be caused by asymmetrical rise/fall times.
The T
for I/O registers that are close to each other and fed by the same or adjacent clock-tree branches. Use the Xilinx FPGA Editor and Timing Analyzer
tools to evaluate clock skew specific to your application.
CKSKEW
I/O clock tree skew across one clock region
value represents the worst-case clock-tree skew observable between sequential I/O elements. Significantly less clock-tree skew exists
Description
www.xilinx.com
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
XC6SLX4
XC6SLX9
XC6SLX16
XC6SLX25
XC6SLX25T
XC6SLX45
XC6SLX45T
XC6SLX75
XC6SLX75T
XC6SLX100
XC6SLX100T
XC6SLX150
XC6SLX150T
Device
(1)
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
-3
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
Speed Grade
-3N
N/A
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
0.06
-2
0.07
0.07
0.07
0.07
0.07
0.07
0.07
0.07
N/A
N/A
N/A
N/A
N/A
-1L
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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