XC3S500E-4VQG100C Xilinx Inc, XC3S500E-4VQG100C Datasheet - Page 222
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XC3S500E-4VQG100C
Manufacturer Part Number
XC3S500E-4VQG100C
Description
FPGA Spartan®-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 100-Pin VTQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S500E-4VQG100C
Package
100VTQFP
Family Name
Spartan®-3E
Device Logic Cells
10476
Device Logic Units
1164
Device System Gates
500000
Number Of Registers
9312
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
66
Ram Bits
368640
Number Of Logic Elements/cells
10476
Number Of Labs/clbs
1164
Total Ram Bits
368640
Number Of I /o
66
Number Of Gates
500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1536 - KIT STARTER SPARTAN-3E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S500E-4VQG100C
Manufacturer:
XILINX32
Quantity:
344
Company:
Part Number:
XC3S500E-4VQG100C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S500E-4VQG100C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Pinout Descriptions
222
FG400 Footprint
Left Half of Package
(top view)
156
62
46
24
16
42
24
16
2
4
8
0
I/O: Unrestricted,
general-purpose user I/O
INPUT: Unrestricted,
general-purpose input pin
DUAL: Configuration pin,
then possible user I/O
VREF: User I/O or input
voltage reference for bank
CLK: User I/O, input, or
clock buffer input
CONFIG: Dedicated
configuration pins
JTAG: Dedicated JTAG
port pins
GND: Ground
VCCO: Output voltage
supply for bank
VCCINT: Internal core
supply voltage (+1.2V)
VCCAUX: Auxiliary supply
voltage (+2.5V)
N.C.: Not connected
Figure 88: FG400 Package Footprint (top view)
W
G
M
A
B
C
D
E
F
H
K
L
N
P
R
T
U
V
Y
J
LHCLK5
LHCLK4
VREF_3
INPUT
INPUT
INPUT
L03P_3
L03N_3
L04P_3
L04N_3
L06N_3
L12N_3
L16N_3
L16P_3
L21P_3
L24P_3
L24N_3
L28N_3
L28P_3
L30N_3
TRDY2
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
www.xilinx.com
PROG_B
VCCO_3
VCCO_3
VCCO_3
LHCLK1
L31N_0
L31P_0
L01N_3
L06P_3
L09P_3
L12P_3
L14N_3
INPUT
L21N_3
L26P_3
L26N_3
L30P_3
INPUT
L02P_2
INPUT
L02N_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
VREF_3
VREF_3
LHCLK0
LHCLK7
LHCLK6
VREF_2
INPUT
INPUT
L01P_3
L02N_3
L05N_3
L07P_3
L09N_3
L11P_3
L14P_3
L17N_3
L17P_3
L23P_3
L27P_3
L29N_3
L29P_3
GND
GND
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
VCCAUX
VCCO_0
VCCO_3
VCCO_3
HSWAP
INPUT
L29N_0
L32P_0
L32N_0
L02P_3
L05P_3
L07N_3
L11N_3
L19N_3
L23N_3
L27N_3
INPUT
L01P_2
L01N_2
L04P_2
L04N_2
CSO_B
INIT_B
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4
VCCO_2
VREF_0
VREF_3
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
L29P_0
L27N_0
L30N_0
L30P_0
L08N_3
L08P_3
L19P_3
L25P_3
L25N_3
L06P_2
L03P_2
L03N_2
DOUT
CSI_B
BUSY
MOSI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
5
Bank 0
Bank 2
VCCO_3
VREF_3
VREF_3
L25N_0
L28N_0
INPUT
INPUT
L13N_3
INPUT
L06N_2
INPUT
INPUT
INPUT
INPUT
L27P_0
L28P_0
L26N_0
L10P_3
L13P_3
L20P_3
L20N_3
L05P_2
L05N_2
L08P_2
L08N_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
6
VCCO_0
VCCAUX
VREF_0
LHCLK2
LHCLK3
VREF_2
L25P_0
INPUT
L26P_0
L24N_0
L10N_3
L15P_3
L15N_3
L18N_3
L22P_3
L22N_3
L09N_2
L09P_2
L07N_2
L07P_2
DS312-4 (v3.8) August 26, 2009
IRDY2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
7
VCCINT
VCCINT
VCCO_2
VREF_0
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
L10N_2
L13N_2
L22N_0
L23N_0
L23P_0
L24P_0
L20P_0
L18P_3
L11N_2
L11P_2
L10P_2
GND
GND
Product Specification
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
VCCINT
VCCINT
VCCINT
VCCAUX
GCLK11
GCLK12
L18N_0
L22P_0
L21N_0
L21P_0
L19P_0
L19N_0
INPUT
L20N_0
INPUT
L14P_2
L12N_2
L12P_2
L15P_2
L13P_2
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
9
DS312-4_08_101905
VCCINT
VCCINT
VCCINT
VCCAUX
VCCO_0
VCCO_0
GCLK10
GC
GCLK14
VREF_2
GCLK13
L16N_0
INPUT
INPUT
L16N_2
INPUT
L15N_2
L18P_0
L17N_0
L17P_0
L16P_2
L14N_2
L18P_2
GCLK7
GCLK9
GCLK8
GCLK2
GND
GND
GND
GND
10
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D3
D4
D6
D2
LK15
R