XC3S250E-4TQ144C Xilinx Inc, XC3S250E-4TQ144C Datasheet - Page 138
XC3S250E-4TQ144C
Manufacturer Part Number
XC3S250E-4TQ144C
Description
FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 144-Pin TQFP
Manufacturer
Xilinx Inc
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S250E-4TQ144C
Package
144TQFP
Family Name
Spartan®-3E
Device Logic Cells
5508
Device Logic Units
612
Device System Gates
250000
Number Of Registers
4896
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
108
Ram Bits
221184
Available stocks
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Quantity
Price
Company:
Part Number:
XC3S250E-4TQ144C
Manufacturer:
XILINX
Quantity:
2 000
Part Number:
XC3S250E-4TQ144C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
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DC and Switching Characteristics
Configurable Logic Block (CLB) Timing
Table 98: CLB (SLICEM) Timing
138
Notes:
1.
Clock-to-Output Times
T
Setup Times
T
T
Hold Times
T
T
Clock Timing
T
T
F
Propagation Times
T
Set/Reset Pulse Width
T
AS
AH
CKO
DICK
CKDI
CH
CL
TOG
ILO
RPW_CLB
The numbers in this table are based on the operating conditions set forth in
Symbol
When reading from the FFX (FFY) Flip-Flop,
the time from the active transition at the CLK
input to data appearing at the XQ (YQ) output
Time from the setup of data at the F or G input
to the active transition at the CLK input of the
CLB
Time from the setup of data at the BX or BY
input to the active transition at the CLK input of
the CLB
Time from the active transition at the CLK input
to the point where data is last held at the F or
G input
Time from the active transition at the CLK input
to the point where data is last held at the BX or
BY input
The High pulse width of the CLB’s CLK signal
The Low pulse width of the CLK signal
Toggle frequency (for export control)
The time it takes for data to travel from the
CLB’s F (G) input to the X (Y) output
The minimum allowable pulse width, High or
Low, to the CLB’s SR input
Description
www.xilinx.com
Table
0.46
1.58
0.70
0.70
1.57
Min
0
0
0
-
-
77.
-5
Max
0.52
0.66
657
Speed Grade
-
-
-
-
-
-
-
0.52
1.81
0.80
0.80
1.80
Min
DS312-3 (v3.8) August 26, 2009
0
0
0
-
-
-4
Product Specification
Max
0.60
0.76
572
-
-
-
-
-
-
-
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
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