XC3S1500-4FG320I Xilinx Inc, XC3S1500-4FG320I Datasheet - Page 29
XC3S1500-4FG320I
Manufacturer Part Number
XC3S1500-4FG320I
Description
FPGA Spartan®-3 Family 1.5M Gates 29952 Cells 630MHz 90nm Technology 1.2V 320-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S1500-4FG320I
Package
320FBGA
Family Name
Spartan®-3
Device Logic Units
29952
Device System Gates
1500000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
221
Ram Bits
589824
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Part Number:
XC3S1500-4FG320I
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XILINX
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Choosing the READ_FIRST attribute, data already stored in
the addressed location pass to the DO outputs before that
location is overwritten with new data from the DI inputs on
Choosing a third attribute called NO_CHANGE puts the DO
outputs in a latched state when asserting WE. Under this
condition, the DO outputs will retain the data driven just
DS099-2 (v2.5) December 4, 2009
Product Specification
R
Figure 13: Waveforms of Block RAM Data Operations with WRITE_FIRST Selected
Figure 14: Waveforms of Block RAM Data Operations with READ_FIRST Selected
ADDR
ADDR
CLK
CLK
WE
WE
DO
DO
EN
EN
DI
DI
DISABLED
DISABLED
0000
0000
XXXX
XXXX
aa
aa
READ
READ
MEM(aa)
MEM(aa)
www.xilinx.com
1111
bb
MEM(bb)=1111
1111
bb
MEM(bb)=1111
WRITE
WRITE
old MEM(bb)
an enabled active CLK edge. READ_FIRST timing is shown
in the portion of
before WE was asserted. NO_CHANGE timing is shown in
the portion of
1111
Spartan-3 FPGA Family: Functional Description
2222
cc
2222
cc
MEM(cc)=2222
MEM(cc)=2222
WRITE
WRITE
old MEM(cc)
Figure 15
2222
Figure 14
during which WE is High.
dd
dd
DS099-2_14_030403
DS099-2_15_030403
during which WE is High.
XXXX
XXXX
READ
READ
MEM(dd)
MEM(dd)
29
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