XC2V500-6FG456C Xilinx Inc, XC2V500-6FG456C Datasheet - Page 111
![no-image](/images/no-image-200.jpg)
XC2V500-6FG456C
Manufacturer Part Number
XC2V500-6FG456C
Description
FPGA Virtex-II™ Family 500K Gates 6912 Cells 820MHz 0.15um/0.12um (CMOS) Technology 1.5V 456-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2V1000-4BG575I.pdf
(318 pages)
Specifications of XC2V500-6FG456C
Package
456FBGA
Family Name
Virtex-IIÂ
Device Logic Units
6912
Device System Gates
500000
Number Of Registers
6144
Maximum Internal Frequency
820 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
264
Ram Bits
589824
Available stocks
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Quantity
Price
Company:
Part Number:
XC2V500-6FG456C
Manufacturer:
XILINX
Quantity:
101
Company:
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XC2V500-6FG456C
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XILINX
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Part Number:
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Manufacturer:
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Quantity:
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FG456/FGG456 Fine-Pitch BGA Package
As shown in
BGA package. Pins in the XC2V250, XC2V500, and XC2V1000 devices are the same, except for the pin differences in the
XC2V250 and XC2V500 devices shown in the No Connect columns. Following this table are the
BGA Package Specifications (1.00mm
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
DS031-4 (v3.5) November 5, 2007
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
Table
7, XC2V250, XC2V500, and XC2V1000 Virtex-II devices are available in the FG456/FGG456 fine-pitch
IO_L04N_0/VREF_0
IO_L21P_0/VREF_0
IO_L51P_0/VREF_0
IO_L91N_0/VREF_0
IO_L03N_0/VRP_0
IO_L03P_0/VRN_0
Pin Description
IO_L01N_0
IO_L02N_0
IO_L05N_0
IO_L06N_0
IO_L21N_0
IO_L22N_0
IO_L24N_0
IO_L49N_0
IO_L51N_0
IO_L52N_0
IO_L54N_0
IO_L92N_0
IO_L01P_0
IO_L02P_0
IO_L04P_0
IO_L05P_0
IO_L06P_0
IO_L22P_0
IO_L24P_0
IO_L49P_0
IO_L52P_0
IO_L54P_0
IO_L91P_0
IO_L92P_0
pitch).
Pin Number
www.xilinx.com
D10
C10
E10
F10
C4
C5
D6
C6
D7
D8
C8
D9
C9
B4
A4
B5
A5
B6
A6
E7
E8
C7
B7
A7
B8
A8
E9
F9
B9
A9
No Connect in XC2V250
Virtex-II Platform FPGAs: Pinout Information
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
No Connect in XC2V500
FG456/FGG456 Fine-Pitch
NC
NC
NC
NC
NC
NC
Module 4 of 4
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